Alternatives and similar repositories for PYNQ-HelloWorld

Users that are interested in PYNQ-HelloWorld are comparing it to the libraries listed below

• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆157Updated 4 months ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆107Updated 7 years ago
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆74Updated last year
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆241Updated 5 months ago
• Xilinx / Kria-PYNQ
  PYNQ support and examples for Kria SOMs
  ☆123Updated last year
• drichmond / RISC-V-On-PYNQ
  RISC-V Integration for PYNQ
  ☆180Updated 6 years ago
• Xilinx / PYNQ-ComputerVision
  Computer Vision Overlays on Pynq
  ☆189Updated 6 years ago
• Xilinx / Vitis-In-Depth-Tutorial
  ☆117Updated 4 years ago
• Xilinx / PYNQ-BOT
  ☆30Updated 7 years ago
• cathalmccabe / PYNQ_tutorials
  ☆104Updated 2 years ago
• xupgit / Zynq-Design-using-Vivado
  This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
  ☆86Updated 2 years ago
• xupgit / FPGA-Design-Flow-using-Vivado
  This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite
  ☆103Updated 6 years ago
• Avnet / bdf
  Avnet Board Definition Files
  ☆140Updated 3 weeks ago
• Xilinx / PYNQ_Bootcamp
  PYNQ Bootcamp 2019-2024 teaching materials.
  ☆52Updated last year
• Xilinx / kria-vitis-platforms
  Kria Vitis platforms and overlays
  ☆112Updated 8 months ago
• MakarenaLabs / Xilinx-FPGA-HLS-PYNQ-ALVEO-Flow
  Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.
  ☆31Updated 5 years ago
• Xilinx / Vitis_Embedded_Platform_Source
  ☆137Updated 2 months ago
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆213Updated 3 weeks ago
• hillhao / PYNQ-project
  PYNQ, Neural network Language model, Overlay
  ☆112Updated 6 years ago
• Xilinx / XilinxBoardStore
  ☆312Updated this week
• Xilinx / logicnets
  Train and deploy LUT-based neural networks on FPGAs
  ☆106Updated last year
• Xilinx / xup_high_level_synthesis_design_flow
  AMD University Program HLS tutorial
  ☆123Updated last year
• Xilinx / LSTM-PYNQ
  ☆91Updated 5 years ago
• cathalmccabe / pynq-z1_board_files
  PYNQ-Z1 board files for Vivado
  ☆35Updated 4 years ago
• Xilinx / finn-examples
  Dataflow QNN inference accelerator examples on FPGAs
  ☆242Updated 5 months ago
• Xilinx / SDSoC-Tutorials
  SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials
  ☆155Updated 6 years ago
• Xilinx / RFNoC-HLS-NeuralNet
  ☆109Updated 6 years ago
• StefanSredojevic / Deep-Neural-Network-Hardware-Accelerator
  SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…
  ☆112Updated 5 years ago
• PeterOgden / overlay_tutorial
  Premade bitstreams and block designs to complemented the PYNQ overlay tutorial
  ☆40Updated 4 years ago
• manoharvhr / PYNQ-Torch
  PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform
  ☆75Updated 5 years ago