OpenXuantie - OpenE906 Core
☆178Jun 28, 2024Updated 2 years ago
Alternatives and similar repositories for opene906
Users that are interested in opene906 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- OpenXuantie - OpenE902 Core☆180Jun 28, 2024Updated 2 years ago
- OpenXuantie - OpenC906 Core☆422Jun 28, 2024Updated 2 years ago
- OpenXuantie - OpenC910 Core☆1,479Jun 28, 2024Updated 2 years ago
- Yocto project for Xuantie RISC-V CPU☆42Jun 5, 2026Updated 4 months ago
- VeeR EH1 core☆971Jul 16, 2026Updated 2 months ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- IC design and development should be faster，simpler and more reliable☆2,025Dec 31, 2021Updated 4 years ago
- The Ultra-Low Power RISC-V Core☆1,937Sep 25, 2026Updated 2 weeks ago
- RiftCore is a 9-stage, single-issue, out-of-order 64-bits RISC-V Core, which supports RV64IMC and 3-level Cache System☆45Sep 21, 2022Updated 4 years ago
- The 'missing header' for Chisel☆24Feb 5, 2026Updated 8 months ago
- Quasar 2.0: Chisel equivalent of SweRV-EL2☆35Apr 13, 2021Updated 5 years ago
- RISC-V Summit China 2023☆40Sep 27, 2023Updated 3 years ago
- 32-bit Superscalar RISC-V CPU☆1,315Sep 18, 2021Updated 5 years ago
- GCC for Xuantie RISC-V CPU, the GNU Compiler Collection.☆22Sep 16, 2026Updated 3 weeks ago
- A framework for building hardware verification platform using software method☆40Apr 19, 2026Updated 5 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Nuclei Board Labs☆61Jan 8, 2024Updated 2 years ago
- RV64GC Linux Capable RISC-V Core☆71Aug 7, 2026Updated 2 months ago
- Qemu for Xuantie RISC-V CPU, a generic machine emulator and virtualizer.☆58Jun 10, 2026Updated 4 months ago
- OpenSource HummingBird RISC-V Software Development Kit☆179Dec 5, 2023Updated 2 years ago
- HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded f…☆116Oct 31, 2023Updated 2 years ago
- Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2☆2,855Mar 24, 2021Updated 5 years ago
- ☆16Dec 4, 2021Updated 4 years ago
- The official NaplesPU hardware code repository☆37Jul 27, 2019Updated 7 years ago
- Rocket Chip Generator☆3,884Sep 13, 2026Updated 3 weeks ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Ibex is a small 32-bit RISC-V CPU core with high-level of verification (previously known as zero-riscy)☆2,095Updated this week
- PicoRV32 - A Size-Optimized RISC-V CPU☆4,391Sep 7, 2026Updated last month
- Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.☆41Feb 6, 2024Updated 2 years ago
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆61Feb 17, 2022Updated 4 years ago
- ☆17Mar 17, 2022Updated 4 years ago
- Open-source high-performance RISC-V processor☆7,296Updated this week
- Andes Vector Extension support added to riscv-dv☆19May 29, 2020Updated 6 years ago
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,310Oct 1, 2026Updated last week
- An open-source microcontroller system based on RISC-V☆1,070Feb 6, 2024Updated 2 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- RISC-V CPU Core☆453Jun 24, 2025Updated last year
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆248Jul 16, 2023Updated 3 years ago
- AltOr32 - Alternative Lightweight OpenRisc CPU☆13Dec 17, 2015Updated 10 years ago
- SCR1 is a high-quality open-source RISC-V MCU core in Verilog☆1,006Nov 15, 2024Updated last year
- VeeR EH2 core☆281Updated this week
- CoralNPU behavior simulator based on MPACT-Sim☆28Updated this week
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆3,153Updated this week