yaozhaosh / e200_opensourceLinks
The Ultra-Low Power RISC Core
☆15Updated 5 years ago
Alternatives and similar repositories for e200_opensource
Users that are interested in e200_opensource are comparing it to the libraries listed below
Sorting:
- AMBA bus generator including AXI, AHB, and APB☆106Updated 4 years ago
- OpenXuantie - OpenE906 Core☆140Updated last year
- AHB3-Lite Interconnect☆90Updated last year
- HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded f…☆103Updated last year
- HYF's high quality verilog codes☆15Updated 8 months ago
- OpenXuantie - OpenE902 Core☆154Updated last year
- A VerilogHDL MCU Core based ARMv6 Cortex-M0☆21Updated 5 years ago
- AXI DMA 32 / 64 bits☆120Updated 11 years ago
- ☆23Updated 5 months ago
- ☆68Updated 9 years ago
- ☆65Updated 5 years ago
- PulseRain Reindeer - RISCV RV32I[M] Soft CPU☆128Updated 6 years ago
- For pre-silicon developers of RISC-V systems, riscv-vip is a SystemVerilog project that helps with pre-si verification and debug☆63Updated 4 years ago
- SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.☆217Updated 5 years ago
- An AXI4 crossbar implementation in SystemVerilog☆173Updated this week
- AHB DMA 32 / 64 bits☆56Updated 11 years ago
- RTL Verilog library for various DSP modules☆90Updated 3 years ago
- ☆91Updated 2 weeks ago
- AXI4 and AXI4-Lite interface definitions☆94Updated 4 years ago
- UVM实战随书源码☆54Updated 6 years ago
- This is the repository for the IEEE version of the book☆71Updated 4 years ago
- an open source uvm verification platform for e200 (riscv)☆28Updated 7 years ago
- ☆42Updated 3 years ago
- A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz☆72Updated 4 years ago
- ☆73Updated 4 years ago
- Use ORDT and systemRDL tools to generate C/Verilog header files, register RTL, UVM register models, and docs from compiled SystemRDL.☆69Updated 5 years ago
- AXI4 BFM in Verilog☆32Updated 8 years ago
- System Verilog and Emulation. Written all the five channels.☆34Updated 8 years ago
- OpenSource HummingBird RISC-V Software Development Kit☆161Updated last year
- ☆36Updated 10 years ago