XUANTIE-RV / opensbiLinks
☆17Updated 5 months ago
Alternatives and similar repositories for opensbi
Users that are interested in opensbi are comparing it to the libraries listed below
Sorting:
- riscv64 d1-nezha baremeta(Allwinner D1 riscv chip)☆87Updated 4 years ago
- Nuclei RISC-V Software Development Kit☆156Updated this week
- Qemu for Xuantie RISC-V CPU, a generic machine emulator and virtualizer.☆51Updated 6 months ago
- Linux kernel source tree☆46Updated 11 months ago
- OpenXuantie - OpenE906 Core☆152Updated last year
- DEPRECATED: Please update to risc-none-elf-gcc-xpack☆125Updated 3 years ago
- RISC-V Scratchpad☆74Updated 3 years ago
- GNU toolchain for Xuantie RISC-V CPU, including GCC and Binutils ……☆108Updated 9 months ago
- Official Intel SOCFPGA U-Boot repository. Note: (1) A "RC" labeled branch is for internal active development use and customer early acces…☆116Updated 3 weeks ago
- 8051 core☆112Updated 11 years ago
- OpenXuantie - OpenC906 Core☆387Updated last year
- The GNU MCU Eclipse RISC-V Embedded GCC☆79Updated 6 years ago
- A RISC-V bare metal example☆54Updated 3 years ago
- RISC-V Profiles and Platform Specification☆116Updated 2 years ago
- open-source SDKs for the SCR1 core☆77Updated last year
- ☆42Updated 4 years ago
- 8051 soft CPU core. 700-lines statements for 111 instructions . Fully synthesizable Verilog-2001 core.☆196Updated 6 years ago
- u-boot-xarm from xilinx git repo with Digilent additions☆31Updated last year
- PLIC Specification☆150Updated this week
- busybear-linux is a tiny RISC-V Linux root filesystem image that targets the VirtIO board in riscv-qemu.☆99Updated last year
- Simple machine mode program to probe RISC-V control and status registers☆127Updated 2 years ago
- SPI core☆12Updated 11 years ago
- Proposal for new Embedded ABI (EABI) for use in embedded RISC-V systems.☆27Updated 4 years ago
- RISC-V port of newlib☆102Updated 3 years ago
- ☆99Updated 3 weeks ago
- RISC-V Processor Trace Specification☆205Updated this week
- SDK Firmware infrastructure, contain RTOS Abstraction Layer, demos, SweRV Processor Support Package, and more ...☆30Updated 4 years ago
- 🐛 JTAG debug transport module (DTM) - compatible to the RISC-V debug specification.☆27Updated 3 years ago
- http://os.cs.tsinghua.edu.cn/research/undergraduate/zwpu2019☆12Updated 6 years ago
- Tools for analyzing and browsing Tarmac instruction traces.☆79Updated 3 months ago