Alternatives and similar repositories for RiftCore

Users that are interested in RiftCore are comparing it to the libraries listed below

• cnrv / CNRV-FPU
  Basic floating-point components for RISC-V processors
  ☆67Updated 6 years ago
• pulp-platform / pulp_cluster
  The multi-core cluster of a PULP system.
  ☆109Updated last month
• pulp-platform / axi_riscv_atomics
  AXI Adapter(s) for RISC-V Atomic Operations
  ☆66Updated 2 weeks ago
• Chainsaw-Team / Chainsaw
  a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…
  ☆67Updated last year
• pulp-platform / pulp_soc
  pulp_soc is the core building component of PULP based SoCs
  ☆81Updated 9 months ago
• pulp-platform / tech_cells_generic
  Technology dependent cells instantiated in the design for generic process (simulation, FPGA)
  ☆75Updated last month
• openhwgroup / cv-hpdcache
  RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores
  ☆94Updated 3 weeks ago
• LCAI-TIHU / HW
  LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peri…
  ☆44Updated 2 years ago
• riscv-boom / riscv-coremark
  Setup scripts and files needed to compile CoreMark on RISC-V
  ☆72Updated last year
• optimsoc / optimsoc
  OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores
  ☆87Updated 4 years ago
• freechipsproject / ip-contributions
  For contributions of Chisel IP to the chisel community.
  ☆70Updated last year
• pulp-platform / iDMA
  A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)
  ☆189Updated 3 months ago
• ben-marshall / croyde-riscv
  A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.
  ☆48Updated 3 years ago
• Xilinx / pcie-model
  PCI Express controller model
  ☆71Updated 3 years ago
• pulp-platform / redmule
  ☆89Updated last week
• whutddk / Rift2Core
  Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.
  ☆39Updated last year
• agra-uni-bremen / microrv32
  SpinalHDL based, FPGA Suitable RTL Implementation of RISC-V RV32. Aligned with RISC-V Virtual Prototype
  ☆51Updated last year
• oprecomp / DDR4_controller
  ☆70Updated 4 years ago
• openhwgroup / cva5
  The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.
  ☆124Updated 5 months ago
• pulp-platform / spatz
  Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.
  ☆130Updated last week
• ic-lab-duth / RISC-V-Vector
  Vector processor for RISC-V vector ISA
  ☆133Updated 5 years ago
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆114Updated 2 years ago
• lowRISC / muntjac
  64-bit multicore Linux-capable RISC-V processor
  ☆101Updated 7 months ago
• pulp-platform / pulp-runtime
  Simple runtime for Pulp platforms
  ☆49Updated last month
• pulp-platform / serial_link
  A simple, scalable, source-synchronous, all-digital DDR link
  ☆32Updated 2 weeks ago
• pulp-platform / register_interface
  Generic Register Interface (contains various adapters)
  ☆134Updated last month
• pulp-platform / axi_llc
  ☆33Updated last month
• Jerc007 / Open-GPGPU-FlexGrip-
  FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation
  ☆114Updated 2 years ago
• cassuto / nano-cpu32k
  Linux-capable superscalar out-of-order RISC core (with Cache& MMU) and SoC, having been verified on Xilinx Kintex-7 FPGA.
  ☆55Updated last year
• taneroksuz / fpu
  IEEE 754 single and double precision floating point library in systemverilog and vhdl
  ☆73Updated last year