Alternatives and similar repositories for Rift2Core

Users that are interested in Rift2Core are comparing it to the libraries listed below

• whutddk / RiftCore
  RiftCore is a 9-stage, single-issue, out-of-order 64-bits RISC-V Core, which supports RV64IMC and 3-level Cache System
  ☆44Updated 3 years ago
• Lampro-Mellon / Quasar
  Quasar 2.0: Chisel equivalent of SweRV-EL2
  ☆31Updated 4 years ago
• riscv-boom / riscv-coremark
  Setup scripts and files needed to compile CoreMark on RISC-V
  ☆71Updated last year
• AlessandroCilardo / NaplesPU
  The official NaplesPU hardware code repository
  ☆20Updated 6 years ago
• pulp-platform / pulp_cluster
  The multi-core cluster of a PULP system.
  ☆109Updated last month
• ic-lab-duth / DRIM-S
  DUTH RISC-V Superscalar Microprocessor
  ☆32Updated last year
• hsa-ees / paranut
  The ParaNut Processor - Highly Parallel and More Than Just a CPU Core
  ☆36Updated 2 years ago
• AlSaqr-platform / he-soc
  ☆32Updated last month
• cnrv / CNRV-FPU
  Basic floating-point components for RISC-V processors
  ☆67Updated 6 years ago
• pulp-platform / redmule
  ☆88Updated last week
• pulp-platform / gvsoc
  Pulp virtual platform
  ☆24Updated 4 months ago
• pulp-platform / pulp-runtime
  Simple runtime for Pulp platforms
  ☆49Updated last month
• redpanda3 / chisel-book
  Hardware design with Chisel
  ☆35Updated 2 years ago
• bhunt2 / DDR4Sim
  DDR4 Simulation Project in System Verilog
  ☆42Updated 11 years ago
• IBM / rocc-software
  C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)
  ☆53Updated 5 years ago
• chipsalliance / rocket-tools
  Software tools that support rocket-chip (GNU toolchain, ISA simulator, tests)
  ☆59Updated 2 years ago
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆113Updated 2 years ago
• freechipsproject / ip-contributions
  For contributions of Chisel IP to the chisel community.
  ☆68Updated last year
• chipsalliance / systemc-compiler
  Intel Compiler for SystemC
  ☆26Updated 2 years ago
• riscv-non-isa / tg-nexus-trace
  RISC-V Nexus Trace TG documentation and reference code
  ☆55Updated 11 months ago
• agra-uni-bremen / microrv32
  SpinalHDL based, FPGA Suitable RTL Implementation of RISC-V RV32. Aligned with RISC-V Virtual Prototype
  ☆51Updated last year
• pulp-platform / tech_cells_generic
  Technology dependent cells instantiated in the design for generic process (simulation, FPGA)
  ☆70Updated last week
• Xilinx / pcie-model
  PCI Express controller model
  ☆70Updated 3 years ago
• OpenXiangShan / HuanCun
  Open-source high-performance non-blocking cache
  ☆91Updated this week
• AI-Vector-Accelerator / ava-core
  A lightweight core for the CV32E40 implementing the RISC-V vector extension specification. (v0.8)
  ☆35Updated 4 years ago
• pulp-platform / axi_riscv_atomics
  AXI Adapter(s) for RISC-V Atomic Operations
  ☆66Updated last month
• mpskex / chisel-npu
  Chisel implementation of Neural Processing Unit for System on the Chip
  ☆23Updated 3 months ago
• SchaffHub / RISC-Verdi
  Synopsys Verdi applet that presents a view of the source code running on a RISC-V processor with a simulation waveform.
  ☆33Updated 5 years ago
• amichai-bd / riscv-multi-core-lotr
  RISCV core RV32I/E.4 threads in a ring architecture
  ☆33Updated 2 years ago
• RSPwFPGAs / qemu-hdl-cosim
  VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs
  ☆51Updated 4 years ago