whutddk / Rift2CoreLinks
Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.
☆39Updated last year
Alternatives and similar repositories for Rift2Core
Users that are interested in Rift2Core are comparing it to the libraries listed below
Sorting:
- RiftCore is a 9-stage, single-issue, out-of-order 64-bits RISC-V Core, which supports RV64IMC and 3-level Cache System☆42Updated 2 years ago
- Quasar 2.0: Chisel equivalent of SweRV-EL2☆30Updated 4 years ago
- For contributions of Chisel IP to the chisel community.☆61Updated 6 months ago
- Simple runtime for Pulp platforms☆48Updated 2 weeks ago
- DUTH RISC-V Superscalar Microprocessor☆31Updated 7 months ago
- Tightly-coupled cache coherence unit for CVA6 using the ACE protocol☆31Updated last year
- Technology dependent cells instantiated in the design for generic process (simulation, FPGA)☆60Updated 4 months ago
- VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs☆47Updated 4 years ago
- ☆31Updated this week
- RISC-V Core Local Interrupt Controller (CLINT)☆26Updated last year
- Open source high performance IEEE-754 floating unit☆72Updated last year
- RISCV core RV32I/E.4 threads in a ring architecture