Alternatives and similar repositories for usb_phy

Users that are interested in usb_phy are comparing it to the libraries listed below

• freecores / turbo8051
  turbo 8051
  ☆29Updated 7 years ago
• freecores / usbhostslave
  USB 1.1 Host and Function IP core
  ☆23Updated 10 years ago
• ultraembedded / core_spiflash
  SPI-Flash XIP Interface (Verilog)
  ☆38Updated 3 years ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆44Updated 5 years ago
• ultraembedded / core_enet
  Ethernet MAC 10/100 Mbps
  ☆27Updated 3 years ago
• freecores / uart2spi
  UART To SPI
  ☆17Updated 10 years ago
• freecores / wdsp
  DSP WishBone Compatible Cores
  ☆14Updated 10 years ago
• shalan / QSPI_XIP_CTRL_DMC
  Quad SPI Flash XIP Controller with a direct mapped cache
  ☆11Updated 4 years ago
• freecores / wb_dma
  WISHBONE DMA/Bridge IP Core
  ☆18Updated 10 years ago
• antmicro / openssd-nvme
  ☆25Updated 4 years ago
• esynr3z / usb20dev
  USB 2.0 FS Device controller IP core written in SystemVerilog
  ☆36Updated 6 years ago
• freecores / pci
  PCI bridge
  ☆18Updated 10 years ago
• stnolting / cjtag_bridge
  🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.
  ☆24Updated 3 years ago
• pulp-platform / jtag_dpi
  JTAG DPI module for SystemVerilog RTL simulations
  ☆27Updated 9 years ago
• CospanDesign / nysa-sdio-device
  SDIO Device Verilog Core
  ☆22Updated 6 years ago
• siorpaes / SimpleSoC
  Very simple Cortex-M1 SoC design based on ARM DesignStart
  ☆17Updated 3 years ago
• cudnn / USBtoMIPI
  - Use FPGA to implement MIPI interface; - Get command from PC through USB communication; - Decode command in FPGA
  ☆11Updated 7 years ago
• siorpaes / BareBonesCortexM0
  Extremely basic CortexM0 SoC based on ARM DesignStart Eval
  ☆27Updated 6 years ago
• freecores / mac_layer_switch
  100 MB/s Ethernet MAC Layer Switch
  ☆15Updated 10 years ago
• xycfwrj / zynq_axi_ddr_barebone
  minimal code to access ps DDR from PL
  ☆20Updated 5 years ago
• analogdevicesinc / testbenches
  Testbenches for HDL projects
  ☆18Updated this week
• open-dv / dma_axi
  ☆16Updated 6 years ago
• subutai-attic / pars
  ☆30Updated 8 years ago
• freecores / ddr3_sdram
  DDR3 SDRAM controller
  ☆18Updated 10 years ago
• regymm / ymmcu-ft2232
  FT2232HL JTAG & UART Downloader
  ☆15Updated 3 years ago
• ultraembedded / core_mmc
  MMC (and derivative standards) host controller
  ☆24Updated 4 years ago
• caicaicai-ji / QSPI_FOR_SOC
  QSPI for SoC
  ☆22Updated 5 years ago
• freecores / jtag
  JTAG Test Access Port (TAP)
  ☆34Updated 10 years ago
• dpiegdon / verilog-can
  Verilog CAN controller that is compatible to the SJA 1000.
  ☆13Updated 4 years ago
• ultraembedded / core_usb_bridge
  USB -> AXI Debug Bridge
  ☆39Updated 4 years ago