☆24May 26, 2022Updated 3 years ago
Alternatives and similar repositories for riscv
Users that are interested in riscv are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆38Oct 21, 2025Updated 5 months ago
- A harvard architecture CPU based on RISC-V.☆16Aug 25, 2023Updated 2 years ago
- A Custom RISC-V Instruction Extension for SNN and CNN Computation☆34Aug 22, 2024Updated last year
- Used FPGA board and System Verilog to design controller, DMA, pipelined SIMD processor, and GEMM accelerator☆12Aug 26, 2023Updated 2 years ago
- ☆14Nov 8, 2023Updated 2 years ago
- GPGPU-Sim 中文注释版代码，包含 GPGPU-Sim 模拟器的最新版代码，经过中文注释，以帮助中文用户更好地理解和使用该模拟器。☆28Dec 18, 2024Updated last year
- ☆34Jul 17, 2023Updated 2 years ago
- Tender: Accelerating Large Language Models via Tensor Decompostion and Runtime Requantization (ISCA'24)☆31Jul 4, 2024Updated last year
- study uvm step by step☆11Mar 28, 2019Updated 6 years ago
- AIChip 2021 project, NCKU☆17May 6, 2021Updated 4 years ago
- Hardware Accelerators on FPGA for Computer Vision Applications☆12Dec 16, 2025Updated 3 months ago
- A collection of demos for the STC89C52 chip that go along with my ongoing blog series about 8051 micro-controller derivatives.☆16Jan 26, 2026Updated last month
- 一个JPEG有损图像压缩编码器☆13May 22, 2023Updated 2 years ago
- Course Project for High Level Chip Design （高层次芯片设计）☆17Jan 2, 2025Updated last year
- The 'missing header' for Chisel☆24Feb 5, 2026Updated last month
- 大三上做的本科毕设，包含BNN的替代梯度训练，verilog电路实现，完成180nm工艺流片。☆22Jun 30, 2025Updated 8 months ago
- MINT, Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks, ASP-DAC 2024, Nominated for Best Paper Award☆16Apr 12, 2024Updated last year
- Engineering Program on RTL Design for FPGA Accelerator☆33Aug 1, 2020Updated 5 years ago
- IC设计中的一些经典书籍☆13Jul 28, 2020Updated 5 years ago
- Digital system design: Training lessons and exercise projects for students☆11May 12, 2023Updated 2 years ago
- jyy os enhanced☆13Jul 10, 2025Updated 8 months ago
- Transparent Cudnn / Cublas / Eigen usage for the deep learning training using MNIST dataset.☆18Sep 3, 2020Updated 5 years ago
- The OpenPiton Platform☆17Aug 14, 2024Updated last year
- ☆11Dec 15, 2023Updated 2 years ago
- ☆11Mar 14, 2023Updated 3 years ago
- syn script for DC Compiler☆14May 15, 2022Updated 3 years ago
- C rewrite of a minimal Python JPEG decoder☆12Jan 2, 2019Updated 7 years ago
- ☆10Jul 18, 2024Updated last year
- RISCV implementation in Verilog (RV32I spec)☆18Nov 5, 2025Updated 4 months ago
- Binary translation in Rust☆13Jun 22, 2020Updated 5 years ago
- AXI-4 RAM Tester Component☆21Aug 5, 2020Updated 5 years ago
- RISC-V processor model☆11Nov 10, 2020Updated 5 years ago
- ☆124Mar 13, 2026Updated last week
- CMix-NN: Mixed Low-Precision CNN Library for Memory-Constrained Edge Devices☆49Mar 19, 2020Updated 6 years ago
- Human Activity Recognition Using Convolutional Neural Network in Keras for SensorTile (STMicroelectronics)☆11Jul 16, 2019Updated 6 years ago
- opencv和ffmpeg结合实现推流美颜☆31Dec 12, 2018Updated 7 years ago
- 记录量化LLM中的总结。☆63Jan 8, 2026Updated 2 months ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆112Apr 3, 2020Updated 5 years ago
- HLS project modeling various sparse accelerators.☆12Jan 11, 2022Updated 4 years ago