QShen3 / CNN-FPGALinks
使用Verilog实现的CNN模块,可以方便的在FPGA项目中使用
☆580Updated 7 years ago
Alternatives and similar repositories for CNN-FPGA
Users that are interested in CNN-FPGA are comparing it to the libraries listed below
Sorting:
- CNN acceleration on virtex-7 FPGA with verilog HDL☆473Updated 7 years ago
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆364Updated 2 years ago
- Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database☆572Updated 4 years ago
- FPGA project☆237Updated 3 years ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆249Updated 7 years ago
- FPGA☆159Updated last year
- [ICTA'21] First Prize Winner of the 2021 DIGILENT Cup, China College Integrated Circuit Competition☆267Updated last year
- This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.☆785Updated 6 years ago
- A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard☆889Updated last year
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆194Updated last year
- Implement Tiny YOLO v3 on ZYNQ☆306Updated 9 months ago
- 在FPGA上面实现一个NPU计算单元。能够执行矩阵运算(ADD/ADDi/ADDs/MULT/MULTi/DOT等)、图像处理运算(CONV/POOL等)、非线性映射(RELU/TANH/SIGM等)。☆293Updated 7 years ago
- FPGA Accelerator for CNN using Vivado HLS☆331Updated 4 years ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆213Updated 2 years ago
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆221Updated 3 months ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆179Updated 2 years ago
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆142Updated 2 years ago
- Implementation of CNN using Verilog☆241Updated 8 years ago
- Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.☆163Updated 5 years ago
- ☆302Updated last year
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆88Updated 3 years ago
- HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn☆241Updated 4 years ago
- NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.☆383Updated 2 years ago
- The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient t…☆46Updated last year
- 一个开源的FPGA神经网络加速器。☆188Updated 2 years ago
- AMBA bus lecture material☆508Updated 6 years ago
- PYNQ学习资料☆174Updated 6 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆187Updated 9 years ago
- An open source library for image processing on FPGA.☆624Updated 10 years ago
- 本工程使用纯verilog编写rtl代码,在FPGA上搭建神经网络LeNet-5,实现手写数字识别的功能。☆36Updated last year