sumanth-kalluri / cnn_hardware_acclerator_for_fpgaLinks
This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Networks on FPGAs
☆189Updated last year
Alternatives and similar repositories for cnn_hardware_acclerator_for_fpga
Users that are interested in cnn_hardware_acclerator_for_fpga are comparing it to the libraries listed below
Sorting:
- FPGA☆159Updated last year
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆244Updated 6 years ago
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆169Updated last year
- Convolutional accelerator kernel, target ASIC & FPGA☆233Updated 2 years ago
- Convolutional Neural Network RTL-level Design☆72Updated 4 years ago
- FPGA/AES/LeNet/VGG16☆109Updated 7 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆103Updated last year
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆203Updated 3 weeks ago
- Implementation of CNN using Verilog☆230Updated 8 years ago
- Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.☆162Updated 4 years ago
- An LeNet RTL implement onto FPGA☆50Updated 7 years ago
- hls code zynq 7020 pynq z2 CNN☆88Updated 6 years ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆171Updated 2 years ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆209Updated 2 years ago
- achieve softmax in PYNQ with heterogeneous computing.☆66Updated 7 years ago
- Deep Learning Accelerator (Convolution Neural Networks)☆195Updated 7 years ago
- CNN accelerator implemented with Spinal HDL☆154Updated last year
- Convolutional Neural Network Using High Level Synthesis☆89Updated 5 years ago
- A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…☆174Updated 5 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆74Updated 7 years ago
- [ICTA'21] First Prize Winner of the 2021 DIGILENT Cup, China College Integrated Circuit Competition☆255Updated last year
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆134Updated 2 years ago
- PYNQ学习资料☆172Updated 5 years ago
- 在FPGA上面实现一个NPU计算单元。能够执行矩阵运算(ADD/ADDi/ADDs/MULT/MULTi/DOT等)、图像处理运算(CONV/POOL等)、非线性映射(RELU/TANH/SIGM等)。☆272Updated 7 years ago
- ☆293Updated last year
- Implement Tiny YOLO v3 on ZYNQ☆304Updated 7 months ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆112Updated 8 years ago
- IC implementation of Systolic Array for TPU☆296Updated last year
- FPGA实现动态图像识别☆23Updated 5 years ago