Verilog Generator of Neural Net Digit Detector for FPGA
☆314Sep 7, 2022Updated 4 years ago
Alternatives and similar repositories for Verilog-Generator-of-Neural-Net-Digit-Detector-for-FPGA
Users that are interested in Verilog-Generator-of-Neural-Net-Digit-Detector-for-FPGA are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Generator of verilog description for FPGA MobileNet implementation☆191Jun 23, 2022Updated 4 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆187Jan 28, 2017Updated 9 years ago
- A convolutional neural network implemented in hardware (verilog)☆167Sep 7, 2017Updated 9 years ago
- 使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用☆594Jun 18, 2018Updated 8 years ago
- CNN acceleration on virtex-7 FPGA with verilog HDL☆489Feb 27, 2018Updated 8 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- The open-source release of "SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip"☆11Oct 7, 2023Updated 3 years ago
- ☆19Dec 19, 2018Updated 7 years ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆262Dec 29, 2018Updated 7 years ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆117Apr 3, 2020Updated 6 years ago
- A Verilog implementation of a hand-written digit recognition Neural Network☆11Nov 16, 2024Updated last year
- Implementation of CNN using Verilog☆249Oct 13, 2017Updated 9 years ago
- An OpenCL-based FPGA Accelerator for Convolutional Neural Networks☆1,395Feb 14, 2022Updated 4 years ago
- This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.☆798Dec 10, 2019Updated 6 years ago
- Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks☆629Jan 3, 2020Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.☆169Dec 13, 2020Updated 5 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆107Dec 14, 2023Updated 2 years ago
- A neural network built in Verilog for the DE1-SoC FPGA board for handwritten digit recognition.☆19Oct 11, 2019Updated 7 years ago
- Verilog modules required to get the OV7670 camera working☆88Jul 26, 2018Updated 8 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆292Dec 5, 2019Updated 6 years ago
- A project on hardware design for convolutional neural network. This neural network is of 2 layers with 400 inputs in the first layer. Thi…☆18Mar 5, 2018Updated 8 years ago
- This is simply a binary neural network implemented on FPGA. The one and only functionality of this crap is to recognize handwritten digit…☆12Apr 20, 2021Updated 5 years ago
- Computer Architecture course's project Fall 2018, Innopolis University.☆10Dec 6, 2018Updated 7 years ago
- Hand written number classification done in hardware (De1-SoC board) using neural networks☆26Mar 21, 2018Updated 8 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard☆931Jul 29, 2024Updated 2 years ago
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆375May 2, 2023Updated 3 years ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆340Jul 9, 2019Updated 7 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆199Mar 20, 2024Updated 2 years ago
- Contains source code for sin/cos table verification using UVM☆23Mar 9, 2021Updated 5 years ago
- FPGA implementation of Cellular Neural Network (CNN)☆145Mar 30, 2018Updated 8 years ago
- Python on Zynq FPGA for Convolutional Neural Networks☆624May 15, 2018Updated 8 years ago
- Caffe to VHDL☆68Jun 17, 2020Updated 6 years ago
- Verilog I2C interface for FPGA implementation☆731Feb 27, 2025Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- FPGA Accelerator for CNN using Vivado HLS☆340Oct 25, 2021Updated 5 years ago
- Example files for the book FPGA SIMULATION☆23Apr 6, 2017Updated 9 years ago
- Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"☆780May 26, 2017Updated 9 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆63Feb 10, 2026Updated 8 months ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆92May 25, 2019Updated 7 years ago
- Implementation of a Tensor Processing Unit for embedded systems and the IoT.☆583Jan 5, 2019Updated 7 years ago
- Quantized Neural Networks (QNNs) on PYNQ☆705Jan 4, 2022Updated 4 years ago