Alternatives and similar repositories for ggz

Users that are interested in ggz are comparing it to the libraries listed below

• eda-lab / CNNAF-CNN-Accelerator_init
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆48Updated 5 years ago
• yztong / LeNet_RTL
  An LeNet RTL implement onto FPGA
  ☆50Updated 7 years ago
• romulus0914 / CNN_VGG19_verilog
  Convolution Neural Network of vgg19 model in verilog
  ☆49Updated 7 years ago
• CodeNameGrapefruit / SoC_CNN
  Convolutional Neural Network Implemented in Verilog for System on Chip
  ☆28Updated 6 years ago
• djtfoo / lenet5-verilog
  A Verilog design of LeNet-5, a Convolutional Neural Network architecture
  ☆34Updated 5 years ago
• zhan6841 / FPGA-Accelerator-for-AES-LeNet-VGG16
  FPGA/AES/LeNet/VGG16
  ☆109Updated 7 years ago
• yuyuranium / FPGA-Project-2022-simple-tpu
  Systolic array based simple TPU for CNN on PYNQ-Z2
  ☆39Updated 3 years ago
• Nitcloud / Image_sim
  基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）
  ☆50Updated 5 years ago
• sumanth-kalluri / cnn_hardware_acclerator_for_fpga
  This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…
  ☆191Updated last year
• ryaanluke / DNN-Hardware-Accelerator
  SystemVerilog files for lab project on a DNN hardware accelerator
  ☆18Updated 4 years ago
• mayshin10 / CNN-Accelerator
  Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.
  ☆20Updated 4 years ago
• wangjidwb123 / AHB-SRAMC
  IC Verification & SV Demo
  ☆54Updated 4 years ago
• louislxw / pe_array
  A linear array of PEs with RISC-V ISA targeting extreme high frequency on Xilinx ZYNQ Ultrascale+, specificially for applications such as…
  ☆13Updated last year
• dldldlfma / super_small_toy_tpu
  ☆44Updated 4 years ago
• xiaoerlang0359 / E203plus
  upgrade to e203 (a risc-v core)
  ☆45Updated 5 years ago
• mfkiwl / E203_dma
  ☆10Updated 5 years ago
• 9334swjtu / PYNQ_softmax
  achieve softmax in PYNQ with heterogeneous computing.
  ☆67Updated 7 years ago
• flymin / vgg16-on-Zynq
  Simulating implement of vgg16 network on Zynq-7020 FPGA
  ☆43Updated 6 years ago
• lirui-shanghaitech / CNN-Accelerator-VLSI
  Convolutional accelerator kernel, target ASIC & FPGA
  ☆235Updated 2 years ago
• Jon3Y / AMBA
  AHB/APB SRAM Inf, VCS&Verdi Sim.
  ☆15Updated 3 years ago
• kdurant / axi-ddr3
  学习AXI接口，以及xilinx DDR3 IP使用
  ☆38Updated 8 years ago
• KasuganoSoraaa / simple-AXI2AHB-bridge
  AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc
  ☆41Updated 3 years ago
• xiesicong / fpga_sobel_ov5640_hdmi
  fpga跑sobel识别算法
  ☆44Updated 4 years ago
• HanPU-Code / CNN_YOLO_AI_accelerator
  This project is to design yolo AI accelerator in verilog HDL.
  ☆28Updated last year
• bird1and1fish / Frame_Difference
  FPGA实现动态图像识别
  ☆23Updated 5 years ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆90Updated 5 years ago
• flymin / LeNet-on-Zynq
  Simulating implement of LeNet network on Zynq-7020 FPGA
  ☆30Updated 6 years ago
• 8krisv / CNN-ACCELERATOR
  Hardware accelerator for convolutional neural networks
  ☆60Updated 3 years ago
• sandy2008 / CNN-FPGA
  ☆19Updated 6 years ago
• WenqiJiang / VGG16_FPGA_Accelerator
  A VGG accelerator by System Verilog on DE1-SoC FPGA. Row Stationary (RS) dataflow is adopted, and computations are based on fixed point 1…
  ☆34Updated 6 years ago