diaoenmao / FPGA-CNNLinks
FPGA implementation of Cellular Neural Network (CNN)
☆142Updated 7 years ago
Alternatives and similar repositories for FPGA-CNN
Users that are interested in FPGA-CNN are comparing it to the libraries listed below
Sorting:
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆182Updated 8 years ago
- A convolutional neural network implemented in hardware (verilog)☆159Updated 7 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆112Updated 8 years ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆236Updated 6 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆183Updated last year
- CNN acceleration on virtex-7 FPGA with verilog HDL☆450Updated 7 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆96Updated last year
- FPGA Accelerator for CNN using Vivado HLS☆317Updated 3 years ago
- verilog CNN generator for FPGA☆34Updated 4 years ago
- Implementation of CNN using Verilog☆218Updated 7 years ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆202Updated last year
- hls code zynq 7020 pynq z2 CNN☆83Updated 6 years ago
- FPGA/AES/LeNet/VGG16☆105Updated 6 years ago
- 中文:☆101Updated 5 years ago
- achieve softmax in PYNQ with heterogeneous computing.☆64Updated 6 years ago
- PYNQ学习资料☆164Updated 5 years ago
- Convolution Neural Network of vgg19 model in verilog☆49Updated 7 years ago
- HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn☆237Updated 4 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆273Updated 5 years ago
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆155Updated last year
- Convolutional Neural Network Using High Level Synthesis☆86Updated 4 years ago
- FPGA☆158Updated last year
- CNN accelerator implemented with Spinal HDL☆150Updated last year
- An LeNet RTL implement onto FPGA☆49Updated 7 years ago
- A FPGA Based CNN accelerator, following Google's TPU V1.☆156Updated 5 years ago
- PYNQ, Neural network Language model, Overlay☆109Updated 6 years ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆110Updated 5 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆72Updated 6 years ago
- Deep Learning Accelerator (Convolution Neural Networks)☆188Updated 7 years ago
- Binarized Convolutional Neural Networks on Software-Programmable FPGAs☆308Updated 4 years ago