romulus0914 / CNN_VGG19_verilog

Related projects ⓘ

Alternatives and complementary repositories for CNN_VGG19_verilog

• CodeNameGrapefruit / SoC_CNN
  Convolutional Neural Network Implemented in Verilog for System on Chip
  ☆22Updated 5 years ago
• eda-lab / CNNAF-CNN-Accelerator_init
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆45Updated 4 years ago
• zhan6841 / FPGA-Accelerator-for-AES-LeNet-VGG16
  FPGA/AES/LeNet/VGG16
  ☆88Updated 6 years ago
• WenqiJiang / VGG16_FPGA_Accelerator
  A VGG accelerator by System Verilog on DE1-SoC FPGA. Row Stationary (RS) dataflow is adopted, and computations are based on fixed point 1…
  ☆29Updated 5 years ago
• ralbertazzi / bnn
  Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools
  ☆47Updated 6 years ago
• pp-Innovate / FPGA-ZynqNet
  FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS
  ☆106Updated 7 years ago
• ac-optimus / Convolution-using-systolic-arrays
  ☆60Updated 5 years ago
• karthisugumar / CSE240D-Hierarchical_Mesh_NoC-Eyeriss_v2
  A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…
  ☆128Updated 4 years ago
• mfarhadi / CNNIOT
  ☆43Updated 6 years ago
• yztong / LeNet_RTL
  An LeNet RTL implement onto FPGA
  ☆38Updated 6 years ago
• HWAC-DL / hwac_object_tracker
  FPGA accelerated TinyYOLO v2 object detection neural network
  ☆66Updated 6 years ago
• zhongguanggong / ggz
  使用FPGA实现CNN模型
  ☆13Updated 5 years ago
• canteen-man / CNN_FPGA_ZYNQ_PYNQ
  hls code zynq 7020 pynq z2 CNN
  ☆77Updated 5 years ago
• onioncc / iSmartDNN
  Light-weighted neural network inference for object detection on small-scale FPGA board
  ☆91Updated 5 years ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆102Updated 6 years ago
• pontazaricardo / Verilog_Calculator_Matrix_Multiplication
  This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.
  ☆46Updated 7 years ago
• ryaanluke / DNN-Hardware-Accelerator
  SystemVerilog files for lab project on a DNN hardware accelerator
  ☆12Updated 3 years ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆83Updated 4 years ago
• patryk-oleniuk / cnn_hw_accelerator
  FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ
  ☆19Updated 5 years ago
• user-xleo / DNN-Accelerator
  A DNN Accelerator implemented with RTL.
  ☆61Updated last year
• arasi15 / CNN-Accelerator-Implementation-based-on-Eyerissv2
  ☆93Updated 4 years ago
• ilaydayaman / CNN_for_SLR
  A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.
  ☆86Updated 10 months ago
• StefanSredojevic / Deep-Neural-Network-Hardware-Accelerator
  SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…
  ☆97Updated 4 years ago
• mayshin10 / CNN-Accelerator
  Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.
  ☆20Updated 3 years ago
• leo47007 / TPU-Tensor-Processing-Unit
  IC implementation of TPU
  ☆86Updated 4 years ago
• sumanth-kalluri / cnn_hardware_acclerator_for_fpga
  This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…
  ☆158Updated 7 months ago
• lirui-shanghaitech / CNN-Accelerator-VLSI
  Convolutional accelerator kernel, target ASIC & FPGA
  ☆162Updated last year
• zhangzek / 3x3_matrix_Systolic_Array_multiplier
  3×3脉动阵列乘法器
  ☆34Updated 5 years ago
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆151Updated 7 years ago
• suhasr1991 / Convolutional-Neural-Network-hardware-using-Verilog
  A project on hardware design for convolutional neural network. This neural network is of 2 layers with 400 inputs in the first layer. Thi…
  ☆16Updated 6 years ago