Alternatives and similar repositories for CNN_for_SLR

Users that are interested in CNN_for_SLR are comparing it to the libraries listed below

• canteen-man / CNN_FPGA_ZYNQ_PYNQ
  hls code zynq 7020 pynq z2 CNN
  ☆83Updated 6 years ago
• sumanth-kalluri / cnn_hardware_acclerator_for_fpga
  This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…
  ☆183Updated last year
• pp-Innovate / FPGA-ZynqNet
  FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS
  ☆112Updated 8 years ago
• zhan6841 / FPGA-Accelerator-for-AES-LeNet-VGG16
  FPGA/AES/LeNet/VGG16
  ☆105Updated 6 years ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆86Updated 4 years ago
• HWAC-DL / hwac_object_tracker
  FPGA accelerated TinyYOLO v2 object detection neural network
  ☆72Updated 6 years ago
• hisrg / PYNQ_CNN_Accelerator_Tutorial
  中文：
  ☆101Updated 5 years ago
• lulinchen / cnn_open
  A hardware implementation of CNN, written by Verilog and synthesized on FPGA
  ☆236Updated 6 years ago
• yztong / LeNet_RTL
  An LeNet RTL implement onto FPGA
  ☆49Updated 7 years ago
• mtmd / FPGA_Based_CNN
  FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.
  ☆182Updated 8 years ago
• AniketBadhan / Convolutional-Neural-Network
  Implementation of CNN using Verilog
  ☆218Updated 7 years ago
• patryk-oleniuk / cnn_hw_accelerator
  FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ
  ☆21Updated 6 years ago
• MasLiang / CNN-On-FPGA
  FPGA
  ☆158Updated last year
• papcjy / mnist_fpga
  using xilinx xc6slx45 to implement mnist net
  ☆83Updated 7 years ago
• GeneralZDS / FPGA-DCNN-Accelerator
  基于HLS的高效深度卷积神经网络FPGA实现方法
  ☆70Updated 6 years ago
• ralbertazzi / bnn
  Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools
  ☆53Updated 7 years ago
• eda-lab / CNNAF-CNN-Accelerator_init
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆48Updated 5 years ago
• bird1and1fish / Frame_Difference
  FPGA实现动态图像识别
  ☆22Updated 4 years ago
• changwoolee / lenet5_hls
  FPGA Accelerator for CNN using Vivado HLS
  ☆317Updated 3 years ago
• FloyedShen / mnist_hls
  Lenet for MNIST handwritten digit recognition using Vivado hls tool
  ☆37Updated 4 years ago
• romulus0914 / CNN_VGG19_verilog
  Convolution Neural Network of vgg19 model in verilog
  ☆49Updated 7 years ago
• padhi499 / Image-Classification-using-CNN-on-FPGA
  Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.
  ☆150Updated 4 years ago
• dhm2013724 / Xilinx_FPGA_HLS-Mapping-Neural-Network-to-Hardware
  At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA
  ☆31Updated 6 years ago
• thedatabusdotio / fpga-ml-accelerator
  This repository hosts the code for an FPGA based accelerator for convolutional neural networks
  ☆155Updated last year
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆159Updated 7 years ago
• sherylll / lenet5-accelerator
  FPGA and GPU acceleration of LeNet5
  ☆34Updated 6 years ago
• ZhaoqxCN / PYNQ-CNN-ATTEMPT
  Some attempts to build CNN on PYNQ.
  ☆24Updated 6 years ago
• JinChen-tw / pynqz2_dpu140
  This TRD is implement DPU v1.4.0 on PYNQ-Z2 board
  ☆45Updated 5 years ago
• mfarhadi / CNNIOT
  ☆46Updated 7 years ago
• WenqiJiang / VGG16_FPGA_Accelerator
  A VGG accelerator by System Verilog on DE1-SoC FPGA. Row Stationary (RS) dataflow is adopted, and computations are based on fixed point 1…
  ☆35Updated 5 years ago