vipinkmenon / neuralNetwork
☆264Updated last year
Alternatives and similar repositories for neuralNetwork:
Users that are interested in neuralNetwork are comparing it to the libraries listed below
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆176Updated last year
- FPGA☆153Updated 9 months ago
- Implementation of CNN using Verilog☆212Updated 7 years ago
- Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.☆145Updated 4 years ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆199Updated last year
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆229Updated 6 years ago
- Convolutional accelerator kernel, target ASIC & FPGA☆194Updated 2 years ago
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆148Updated 10 months ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加 速器☆142Updated 2 years ago
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆169Updated 5 months ago
- FPGA project☆218Updated 3 years ago
- ☆229Updated last year
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆321Updated last year
- Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database☆492Updated 4 years ago
- 包含了SOC设计中的通用IP,如外设、总线结构、基础、验证等☆85Updated this week
- 一个开源的FPGA神经网络加速器。☆160Updated last year
- 使用Verilog实现的CNN模块,可以方便的在FPGA项目中使用☆545Updated 6 years ago
- IC implementation of Systolic Array for TPU☆228Updated 6 months ago
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆101Updated last year
- FPGA/AES/LeNet/VGG16☆102Updated 6 years ago
- AMBA bus lecture material☆428Updated 5 years ago
- 2023集创赛紫光同创杯一等奖项目☆109Updated last year
- Implement Tiny YOLO v3 on ZYNQ☆290Updated last week
- PYNQ学习资料☆163Updated 5 years ago
- Convolutional Neural Network RTL-level Design☆51Updated 3 years ago
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆74Updated 2 years ago
- CNN accelerator implemented with Spinal HDL☆148Updated last year
- 数字IC秋招项目、手撕代码☆35Updated last year
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆94Updated last year
- A convolutional neural network implemented in hardware (verilog)☆157Updated 7 years ago