Alternatives and similar repositories for Convolutional-Neural-Network

Users that are interested in Convolutional-Neural-Network are comparing it to the libraries listed below

• sumanth-kalluri / cnn_hardware_acclerator_for_fpga
  This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…
  ☆194Updated last year
• thedatabusdotio / fpga-ml-accelerator
  This repository hosts the code for an FPGA based accelerator for convolutional neural networks
  ☆180Updated last year
• padhi499 / Image-Classification-using-CNN-on-FPGA
  Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.
  ☆163Updated 5 years ago
• vipinkmenon / neuralNetwork
  ☆300Updated last year
• lulinchen / cnn_open
  A hardware implementation of CNN, written by Verilog and synthesized on FPGA
  ☆249Updated 7 years ago
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆166Updated 8 years ago
• lirui-shanghaitech / CNN-Accelerator-VLSI
  Convolutional accelerator kernel, target ASIC & FPGA
  ☆242Updated 2 years ago
• adki / AMBA_AXI_AHB_APB
  AMBA bus lecture material
  ☆503Updated 6 years ago
• zhan6841 / FPGA-Accelerator-for-AES-LeNet-VGG16
  FPGA/AES/LeNet/VGG16
  ☆108Updated 7 years ago
• WalkerLau / DetectHumanFaces
  Real time face detection based on Arm Cortex-M3 DesignStart and FPGA
  ☆213Updated 2 years ago
• leo47007 / TPU-Tensor-Processing-Unit
  IC implementation of TPU
  ☆147Updated 6 years ago
• abdelazeem201 / Systolic-array-implementation-in-RTL-for-TPU
  IC implementation of Systolic Array for TPU
  ☆329Updated last year
• boaaaang / CNN-Implementation-in-Verilog
  Convolutional Neural Network RTL-level Design
  ☆74Updated 4 years ago
• freecores / dma_axi
  AXI DMA 32 / 64 bits
  ☆124Updated 11 years ago
• djtfoo / lenet5-verilog
  A Verilog design of LeNet-5, a Convolutional Neural Network architecture
  ☆34Updated 5 years ago
• lucky-wfw / ARM_AMBA_Design
  Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
  ☆136Updated 4 years ago
• adki / gen_amba_2021
  AMBA bus generator including AXI4, AXI3, AHB, and APB
  ☆237Updated 2 years ago
• karthisugumar / CSE240D-Hierarchical_Mesh_NoC-Eyeriss_v2
  A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…
  ☆179Updated 6 years ago
• ilaydayaman / CNN_for_SLR
  A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.
  ☆105Updated 2 years ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆90Updated 5 years ago
• gillianGan / ahb_sram_master
  ☆19Updated 5 years ago
• dldldlfma / super_small_toy_tpu
  ☆47Updated 5 years ago
• kerryliukk / NTHU-ICLAB
  清華大學 | 積體電路設計實驗 (IC LAB) | 110上
  ☆47Updated 3 years ago
• dpretet / async_fifo
  A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
  ☆414Updated 4 months ago
• yztong / LeNet_RTL
  An LeNet RTL implement onto FPGA
  ☆50Updated 7 years ago
• taichi-ishitani / tvip-axi
  AMBA AXI VIP
  ☆443Updated last year
• cameronshinn / tiny-tpu
  Small-scale Tensor Processing Unit built on an FPGA
  ☆218Updated 6 years ago
• hunterlew / convolution_network_on_FPGA
  CNN acceleration on virtex-7 FPGA with verilog HDL
  ☆473Updated 7 years ago
• HWAC-DL / hwac_object_tracker
  FPGA accelerated TinyYOLO v2 object detection neural network
  ☆76Updated 7 years ago
• Verdvana / AXI4_Interconnect
  AXI总线连接器
  ☆105Updated 5 years ago