FPGA/AES/LeNet/VGG16
☆108Sep 9, 2018Updated 7 years ago
Alternatives and similar repositories for FPGA-Accelerator-for-AES-LeNet-VGG16
Users that are interested in FPGA-Accelerator-for-AES-LeNet-VGG16 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Simulating implement of vgg16 network on Zynq-7020 FPGA☆43Mar 11, 2019Updated 7 years ago
- An LeNet RTL implement onto FPGA☆51May 4, 2018Updated 7 years ago
- A VGG accelerator by System Verilog on DE1-SoC FPGA. Row Stationary (RS) dataflow is adopted, and computations are based on fixed point 1…☆34Oct 2, 2019Updated 6 years ago
- Simulating implement of LeNet network on Zynq-7020 FPGA☆30Mar 11, 2019Updated 7 years ago
- Convolution Neural Network of vgg19 model in verilog☆50Jan 4, 2018Updated 8 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- This is a 4*5 PE array for LeNet accelerator based on FPGA.☆13Jul 20, 2022Updated 3 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆196Mar 20, 2024Updated 2 years ago
- A Verilog design of LeNet-5, a Convolutional Neural Network architecture☆35Jun 30, 2020Updated 5 years ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆254Dec 29, 2018Updated 7 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Apr 10, 2020Updated 5 years ago
- CNN on Artix-7 FPGA to perform pattern detection from a pool of objects☆12Sep 12, 2018Updated 7 years ago
- A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard☆904Jul 29, 2024Updated last year
- AES加密解密算法的Verilog实现☆71Jan 17, 2016Updated 10 years ago
- CNN acceleration on virtex-7 FPGA with verilog HDL☆479Feb 27, 2018Updated 8 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- FPGA implement of 8x8 weight stationary systolic array DNN accelerator☆17Feb 27, 2021Updated 5 years ago
- [ICTA'21] First Prize Winner of the 2021 DIGILENT Cup, China College Integrated Circuit Competition☆277Apr 1, 2024Updated last year
- 使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用☆586Jun 18, 2018Updated 7 years ago
- Deep Learning Accelerator (Convolution Neural Networks)☆200Dec 15, 2017Updated 8 years ago
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆370May 2, 2023Updated 2 years ago
- FPGA☆160Jun 29, 2024Updated last year
- using xilinx xc6slx45 to implement mnist net☆83Jul 5, 2018Updated 7 years ago
- 本工程使用纯verilog编写rtl代码，在FPGA上搭建神经网络LeNet-5，实现手写数字识别的功能。☆39Nov 18, 2024Updated last year
- Codes to implement MobileNet V2 in a FPGA☆30Dec 21, 2020Updated 5 years ago
- Wordpress hosting with auto-scaling on Cloudways • AdFully Managed hosting built for WordPress-powered businesses that need reliable, auto-scalable hosting. Cloudways SafeUpdates now available.
- 中文：☆109Nov 29, 2019Updated 6 years ago
- FPGA Accelerator for CNN using Vivado HLS☆339Oct 25, 2021Updated 4 years ago
- AXI-4 RAM Tester Component☆21Aug 5, 2020Updated 5 years ago
- Accelerating the AES algorithm on an FPGA and comparing the speedup with both AES and Modified AES algorithms☆33Dec 10, 2021Updated 4 years ago
- ☆19Mar 21, 2023Updated 3 years ago
- AES-based-on-FPGA developed by verilog.☆23Apr 23, 2020Updated 5 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆187Jan 28, 2017Updated 9 years ago
- 🐆 A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration for *AdderNet*☆21May 27, 2024Updated last year
- 使用FPGA 实现CNN模型☆15Jun 21, 2019Updated 6 years ago
- Wordpress hosting with auto-scaling on Cloudways • AdFully Managed hosting built for WordPress-powered businesses that need reliable, auto-scalable hosting. Cloudways SafeUpdates now available.
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的，只有主干网络部署在fpga上，片上资源无法支持整个网络所需资源，建议添 加外部存储及DDR☆146Jul 20, 2023Updated 2 years ago
- 本项目使用 Vivado 和 SDK 工程软件上完成系统设计和生成相关部署文件，并在 ARM＋FPGA 完成项目部署，实现通过摄取图片并通过 ARM＋FPGA 综合部署和加速识别算法，并通过显示驱动，在显示屏上显示摄像头原图和识别结果。☆10Aug 12, 2022Updated 3 years ago
- Generator of verilog description for FPGA MobileNet implementation☆184Jun 23, 2022Updated 3 years ago
- Convolutional accelerator kernel, target ASIC & FPGA☆250Apr 10, 2023Updated 2 years ago
- A Reconfigurable Accelerator for Deep Convolutional Neural Networks Implemented by Chisel3.☆29Jul 14, 2021Updated 4 years ago
- AES☆15Oct 4, 2022Updated 3 years ago
- ☆49May 21, 2018Updated 7 years ago