GuoningHuang / FPGA-CNN-accelerator-based-on-systolic-array

Related projects ⓘ

Alternatives and complementary repositories for FPGA-CNN-accelerator-based-on-systolic-array

• XueTianyu24 / cnn_accelerator
  【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器
  ☆127Updated last year
• flytt-away / FPGA-Video-Capture
  2023集创赛紫光同创杯一等奖项目
  ☆71Updated 10 months ago
• bunny965 / yolov5-fpga-hardware-acceleration
  网络训练、图像预处理以及部分hend功能是基于pc端实现的，只有主干网络部署在fpga上，片上资源无法支持整个网络所需资源，建议添加外部存储及DDR
  ☆65Updated last year
• boaaaang / CNN-Implementation-in-Verilog
  Convolutional Neural Network RTL-level Design
  ☆32Updated 3 years ago
• adamgallas / fpga_accelerator_yolov3tiny
  ☆187Updated 7 months ago
• YutongChenVictor / Fpga-accelerator-demos
  some interesting demos for starters
  ☆62Updated last year
• doveyour / mnist-nnet-hls-zynq7020-fpga
  to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…
  ☆68Updated 3 years ago
• Thes0me / pango_video_local_dimming
  2022年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛紫光同创赛道视频色度亮度提取赛题设计源文件
  ☆31Updated last year
• iharbour-heyaonan / FPGA_image_process
  FPGA实现简单的图像处理算法
  ☆41Updated last year
• Xinyang-ZHANG / MNIST
  MNIST using tensorflow, c++ and fpga (zynq7010)
  ☆27Updated last year
• peilin-chen / hls_for_cnn_mnist
  【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码
  ☆61Updated 2 years ago
• huangxc6 / E203_CNN_Genesys2
  Final Project of Software_Hardware_Co-Design_24Spring. FPGA-based RISC-V+ Convolutional Acceleration Unit.
  ☆10Updated 6 months ago
• cxlisme / FPGA-proj
  FPGA project
  ☆200Updated 2 years ago
• xiaoerlang0359 / E203plus
  upgrade to e203 (a risc-v core)
  ☆37Updated 4 years ago
• Starrynightzyq / Nexys4DDR-ARM-M3-Plate-Recognition
  车牌识别,FPGA,2019全国大学生集成电路创新创业大赛
  ☆128Updated 4 years ago
• MasLiang / CNN-On-FPGA
  FPGA
  ☆141Updated 4 months ago
• CutestPanda / Opensoc
  包含了SOC设计中的通用IP，如外设、总线结构、基础、验证等
  ☆39Updated this week
• lauchinyuan / Booth4_wallace_MULT16_16
  A 16-bit by 16-bit signed binary multiplier based on the Radix-4 Booth algorithm and Wallace Tree reduction
  ☆31Updated 3 months ago
• 19801201 / SpinalHDL_CNN_Accelerator
  CNN accelerator implemented with Spinal HDL
  ☆134Updated 9 months ago
• sumanth-kalluri / cnn_hardware_acclerator_for_fpga
  This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…
  ☆159Updated 7 months ago
• WalkerLau / DetectHumanFaces
  Real time face detection based on Arm Cortex-M3 DesignStart and FPGA
  ☆187Updated last year
• Dazhuzhu-github / systolic-array
  verilog实现TPU中的脉动阵列计算卷积的module
  ☆68Updated 2 years ago
• xddcore / OpenNNA
  一个开源的FPGA神经网络加速器。
  ☆123Updated last year
• xiesicong / fpga_sobel_ov5640_hdmi
  fpga跑sobel识别算法
  ☆26Updated 3 years ago
• ryaanluke / DNN-Hardware-Accelerator
  SystemVerilog files for lab project on a DNN hardware accelerator
  ☆12Updated 3 years ago
• kerryliukk / NTHU-ICLAB
  清華大學 | 積體電路設計實驗 (IC LAB) | 110上
  ☆24Updated 2 years ago
• ChunxuGuo / SummerSchool2022
  ☆57Updated 2 years ago
• lirui-shanghaitech / CNN-Accelerator-VLSI
  Convolutional accelerator kernel, target ASIC & FPGA
  ☆164Updated last year
• 9334swjtu / PYNQ_softmax
  achieve softmax in PYNQ with heterogeneous computing.
  ☆61Updated 6 years ago
• DOUDIU / Hardware-Implementation-of-the-Canny-Edge-Detection-Algorithm
  The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient t…
  ☆29Updated 6 months ago