Alternatives and similar repositories for CNN-Implementation-in-Verilog:

Users that are interested in CNN-Implementation-in-Verilog are comparing it to the libraries listed below

• XueTianyu24 / cnn_accelerator
  【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器
  ☆135Updated last year
• Dazhuzhu-github / systolic-array
  verilog实现TPU中的脉动阵列计算卷积的module
  ☆73Updated 3 years ago
• kerryliukk / NTHU-ICLAB
  清華大學 | 積體電路設計實驗 (IC LAB) | 110上
  ☆29Updated 2 years ago
• lirui-shanghaitech / CNN-Accelerator-VLSI
  Convolutional accelerator kernel, target ASIC & FPGA
  ☆175Updated last year
• GuoningHuang / FPGA-CNN-accelerator-based-on-systolic-array
  2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器，支持yolov3-tiny的第一层卷积层计算，可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。
  ☆132Updated 2 months ago
• karthisugumar / CSE240D-Hierarchical_Mesh_NoC-Eyeriss_v2
  A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…
  ☆136Updated 5 years ago
• yztong / LeNet_RTL
  An LeNet RTL implement onto FPGA
  ☆40Updated 6 years ago
• sumanth-kalluri / cnn_hardware_acclerator_for_fpga
  This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…
  ☆163Updated 10 months ago
• arasi15 / CNN-Accelerator-Implementation-based-on-Eyerissv2
  ☆99Updated 4 years ago
• thedatabusdotio / fpga-ml-accelerator
  This repository hosts the code for an FPGA based accelerator for convolutional neural networks
  ☆137Updated 7 months ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆84Updated 4 years ago
• djtfoo / lenet5-verilog
  A Verilog design of LeNet-5, a Convolutional Neural Network architecture
  ☆23Updated 4 years ago
• padhi499 / Image-Classification-using-CNN-on-FPGA
  Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.
  ☆132Updated 4 years ago
• peilin-chen / hls_for_cnn_mnist
  【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码
  ☆69Updated 2 years ago
• huangxc6 / E203_CNN_Genesys2
  Final Project of Software_Hardware_Co-Design_24Spring. FPGA-based RISC-V+ Convolutional Acceleration Unit.
  ☆12Updated 8 months ago
• eda-lab / CNNAF-CNN-Accelerator_init
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆45Updated 4 years ago
• 9334swjtu / PYNQ_softmax
  achieve softmax in PYNQ with heterogeneous computing.
  ☆61Updated 6 years ago
• Xinyang-ZHANG / MNIST
  MNIST using tensorflow, c++ and fpga (zynq7010)
  ☆26Updated last year
• zhangzek / 3x3_matrix_Systolic_Array_multiplier
  3×3脉动阵列乘法器
  ☆36Updated 5 years ago
• Buck008 / Transformer-Accelerator-Based-on-FPGA
  You can run it on pynq z1. The repository contains the relevant Verilog code, Vivado configuration and C code for sdk testing. The size o…
  ☆141Updated 10 months ago
• CodeNameGrapefruit / SoC_CNN
  Convolutional Neural Network Implemented in Verilog for System on Chip
  ☆26Updated 5 years ago
• abdelazeem201 / Systolic-array-implementation-in-RTL-for-TPU
  IC implementation of Systolic Array for TPU
  ☆178Updated 3 months ago
• dumpo / my_verilog_projects
  数字IC秋招项目、手撕代码
  ☆33Updated 9 months ago
• ryaanluke / DNN-Hardware-Accelerator
  SystemVerilog files for lab project on a DNN hardware accelerator
  ☆14Updated 3 years ago
• Microdent / Handwritten_Mathematical_Calculator_on_FPGA
  A simple demo to implement the Handwritten Mathematical Calculator on PYNQ-Z2 FPGA platform by using HLS.
  ☆37Updated 4 years ago
• taoyilee / clacc
  Deep Learning Accelerator (Convolution Neural Networks)
  ☆170Updated 7 years ago
• mayshin10 / CNN-Accelerator
  Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.
  ☆21Updated 3 years ago
• Verdvana / AXI4_Interconnect
  AXI总线连接器
  ☆93Updated 4 years ago
• MasLiang / CNN-On-FPGA
  FPGA
  ☆144Updated 7 months ago
• Zero0Hero / yolo_e203_fpga
  Nuclei E203 with yolo accelerator based on xc7k325
  ☆9Updated 6 months ago