Simulating implement of vgg16 network on Zynq-7020 FPGA
☆43Mar 11, 2019Updated 7 years ago
Alternatives and similar repositories for vgg16-on-Zynq
Users that are interested in vgg16-on-Zynq are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Simulating implement of LeNet network on Zynq-7020 FPGA☆30Mar 11, 2019Updated 7 years ago
- FPGA/AES/LeNet/VGG16☆108Sep 9, 2018Updated 7 years ago
- A VGG accelerator by System Verilog on DE1-SoC FPGA. Row Stationary (RS) dataflow is adopted, and computations are based on fixed point 1…☆34Oct 2, 2019Updated 6 years ago
- Benchmarking execution time of AlexNet CNN on FPGA and GPU. Developed AlexNet in opencl.☆11Oct 9, 2019Updated 6 years ago
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆88May 30, 2021Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- Wireless Network project, BUAA, 2018☆18Mar 13, 2019Updated 7 years ago
- 使用FPGA实现CNN模型☆15Jun 21, 2019Updated 6 years ago
- FPGA-CNN Application for fruit detection based on Logos-PGL22G Board☆14Aug 24, 2022Updated 3 years ago
- A Reconfigurable Accelerator for Deep Convolutional Neural Networks Implemented by Chisel3.☆29Jul 14, 2021Updated 4 years ago
- [Hackintosh] Configuration for Lenovo Thinkpad X1 Extreme.☆10Feb 10, 2021Updated 5 years ago
- Spiking neural network for Zynq devices with Vivado HLS☆38Feb 21, 2018Updated 8 years ago
- [ICCV 2023] The official implementation of paper "DiffGuard: Semantic Mismatch-Guided Out-of-Distribution Detection using Pre-trained Dif…☆18Jan 8, 2024Updated 2 years ago
- ECCV2022☆15Aug 19, 2022Updated 3 years ago
- Convolution Neural Network of vgg19 model in verilog☆50Jan 4, 2018Updated 8 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- This is the official implementation of ContraNet (NDSS2022).☆21Aug 31, 2023Updated 2 years ago
- A DNN Accelerator implemented with RTL.☆70Jan 9, 2025Updated last year
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆106Dec 14, 2023Updated 2 years ago
- NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.☆387Dec 27, 2023Updated 2 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆187Jan 28, 2017Updated 9 years ago
- Basic chisel difftest environment for RTL design (WIP☆20Mar 8, 2025Updated last year
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆254Dec 29, 2018Updated 7 years ago
- Official code of the paper "Learning to Reduce Information Bottleneck for Object Detection in Aerial Images"☆11Jul 31, 2023Updated 2 years ago
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆91Aug 6, 2022Updated 3 years ago
- Wordpress hosting with auto-scaling on Cloudways • AdFully Managed hosting built for WordPress-powered businesses that need reliable, auto-scalable hosting. Cloudways SafeUpdates now available.
- The Scala parser to parse riscv/riscv-opcodes generate☆25Jan 21, 2026Updated 2 months ago
- 使用Verilog实 现的CNN模块,可以方便的在FPGA项目中使用☆586Jun 18, 2018Updated 7 years ago
- This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.☆787Dec 10, 2019Updated 6 years ago
- Open-source of MSD framework☆16Sep 12, 2023Updated 2 years ago
- This is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code …☆25Jun 28, 2019Updated 6 years ago
- 本项目使用 Vivado 和 SDK 工程软件上完成系统设计和生成相关部署文件,并在 ARM+FPGA 完成项目部署,实现通过摄取图片并通过 ARM+FPGA 综合部署和加速识别算法,并通过显示驱动,在显示屏上显示摄像头原图和识别结果。☆10Aug 12, 2022Updated 3 years ago
- A Customed Operating System with a Shell for MIPS R3000, Ported from JOS☆23Jul 10, 2018Updated 7 years ago
- Panopticon is a complete in-DRAM RowHammer mitigation. This code simulates an implementation of Panopticon in DDR5.☆14Jun 2, 2023Updated 2 years ago
- Implement Tiny YOLO v3 on ZYNQ☆312Apr 14, 2025Updated 11 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- CNN accelerator implemented with Spinal HDL☆158Jan 29, 2024Updated 2 years ago
- a Real-time image recognition project with RTL accelerator and ZYNQ Architecture☆67Apr 8, 2024Updated last year
- ViTALiTy (HPCA'23) Code Repository☆23Mar 13, 2023Updated 3 years ago
- FPGA controller for SSD1306 OLED module on SPI. Optimised for GOWIN FPGA☆15Oct 11, 2018Updated 7 years ago
- ☆26Dec 12, 2022Updated 3 years ago
- Pytorch implementation of our paper accepted by IEEE TNNLS, 2022 — Carrying out CNN Channel Pruning in a White Box☆18Feb 15, 2022Updated 4 years ago
- [ICTA'21] First Prize Winner of the 2021 DIGILENT Cup, China College Integrated Circuit Competition☆277Apr 1, 2024Updated last year