xiangze / CNN_FPGA
verilog CNN generator for FPGA
☆34Updated 4 years ago
Alternatives and similar repositories for CNN_FPGA:
Users that are interested in CNN_FPGA are comparing it to the libraries listed below
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆111Updated 7 years ago
- Convolution Neural Network of vgg19 model in verilog☆46Updated 7 years ago
- This repo is for ECE44x (Fall2015-Spring2016)☆20Updated 7 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆181Updated 8 years ago
- Verilog Convolutional Neural Network on PYNQ☆28Updated 7 years ago
- OpenCL Labs for PAPAA Summer School 2016 Edition☆46Updated 7 years ago
- ☆14Updated 9 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆91Updated 5 years ago
- A VGG accelerator by System Verilog on DE1-SoC FPGA. Row Stationary (RS) dataflow is adopted, and computations are based on fixed point 1…☆31Updated 5 years ago
- A convolutional neural network implemented in hardware (verilog)☆157Updated 7 years ago
- FPGA implementation of Cellular Neural Network (CNN)☆139Updated 7 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆89Updated 6 years ago
- Convolutional Neural Network Implemented in Verilog for System on Chip☆27Updated 5 years ago
- This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.☆50Updated 7 years ago
- ☆65Updated 2 years ago
- To help machines learn what we human beings are doing via a camera is important. Once it comes true, machines can make different response…☆52Updated 6 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆93Updated last year
- FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ☆21Updated 5 years ago
- ☆45Updated 5 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆71Updated 6 years ago
- Caffe to VHDL☆67Updated 4 years ago
- ☆64Updated 6 years ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆107Updated 5 years ago
- Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.☆30Updated 5 years ago
- Design contest for DAC 2018☆17Updated 7 years ago
- Residual Binarized Neural Network☆43Updated 7 years ago
- ☆83Updated 4 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆47Updated 5 years ago
- ☆45Updated 6 years ago
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆141Updated 7 years ago