verilog CNN generator for FPGA
☆34Jan 4, 2021Updated 5 years ago
Alternatives and similar repositories for CNN_FPGA
Users that are interested in CNN_FPGA are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆188Jan 28, 2017Updated 9 years ago
- This repo is for ECE44x (Fall2015-Spring2016)☆21Feb 12, 2018Updated 8 years ago
- FPGA implementation of Cellular Neural Network (CNN)☆143Mar 30, 2018Updated 8 years ago
- CNN accelerator☆30Jun 11, 2017Updated 9 years ago
- OpenCL Labs for PAPAA Summer School 2016 Edition☆46Jul 24, 2017Updated 8 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- FPGA Implementation of Image Processing for MNIST Dataset Based on Convolutional Neural Network Algorithm (CNN)☆11Dec 12, 2023Updated 2 years ago
- Verilog library for implementing neural networks.☆27Aug 19, 2014Updated 11 years ago
- Simulating implement of vgg16 network on Zynq-7020 FPGA☆43Mar 11, 2019Updated 7 years ago
- Zedboard projects☆11May 15, 2016Updated 10 years ago
- Convolution Neural Network of vgg19 model in verilog☆50Jan 4, 2018Updated 8 years ago
- Verilog implementation of the classic arcade game Space Invaders for the Zedboard FPGA board☆45Mar 5, 2018Updated 8 years ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆262Dec 29, 2018Updated 7 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆108Dec 14, 2023Updated 2 years ago
- CNN acceleration on virtex-7 FPGA with verilog HDL☆487Feb 27, 2018Updated 8 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A convolutional neural network implemented in hardware (verilog)☆166Sep 7, 2017Updated 8 years ago
- A project on hardware design for convolutional neural network. This neural network is of 2 layers with 400 inputs in the first layer. Thi…☆18Mar 5, 2018Updated 8 years ago
- [FPGA 2020] Open sourced implementation for the ACM/SIGDA FPGA '20 paper titled "GraphACT: Accelerating GCN Training on CPU-FPGA Heteroge…☆19Mar 6, 2021Updated 5 years ago
- FPGA Accelerator for CNN using Vivado HLS☆340Oct 25, 2021Updated 4 years ago
- Project in course “FPGA Design for Communication Systems”☆16Dec 30, 2023Updated 2 years ago
- This repo contains Go implementation and corresponding APIs for acceleration of Binarized Neural Network (BNN) on FPGAs.☆21Nov 13, 2018Updated 7 years ago
- ES-203 Computer Organization & Architecture CNN on FPGA board☆18Feb 23, 2022Updated 4 years ago
- A 2D mesh Network on Chip with 5-stage pipelined router, all implemented in Verilog and run on Artix-7 FPGA.☆21May 30, 2023Updated 3 years ago
- FPGA controller for SSD1306 OLED module on SPI. Optimised for GOWIN FPGA☆17Oct 11, 2018Updated 7 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- Light-weighted neural network inference for object detection on small-scale FPGA board☆93May 25, 2019Updated 7 years ago
- FPGA/AES/LeNet/VGG16☆108Sep 9, 2018Updated 7 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆116Jun 24, 2017Updated 9 years ago
- ☆119Dec 20, 2017Updated 8 years ago
- 使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用☆590Jun 18, 2018Updated 8 years ago
- This is a collection of works on neural networks and neural accelerators.☆41Mar 3, 2019Updated 7 years ago
- Graph accelerator on FPGAs and ASICs☆11Aug 16, 2018Updated 7 years ago
- Implementation of CNN using Verilog☆249Oct 13, 2017Updated 8 years ago
- IP cores for the FPGA Libre project☆12Aug 7, 2017Updated 8 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning☆568Feb 3, 2024Updated 2 years ago
- An OpenCL-based FPGA Accelerator for Convolutional Neural Networks☆1,384Feb 14, 2022Updated 4 years ago
- Systolic array based simple TPU for CNN on PYNQ-Z2☆50Jun 24, 2022Updated 4 years ago
- Radio Spectrum Viewer and Software Defined Radio in a cheap FPGA board☆21Apr 24, 2023Updated 3 years ago
- DMA controller for CNN accelerator☆15May 22, 2017Updated 9 years ago
- Caffe to VHDL☆68Jun 17, 2020Updated 6 years ago
- An automated HDC platform☆11Mar 16, 2026Updated 4 months ago