trivedidvijen / SPI-to-I2C-Protocol-Conversion-Using-VerilogLinks
SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.
☆11Updated 4 years ago
Alternatives and similar repositories for SPI-to-I2C-Protocol-Conversion-Using-Verilog
Users that are interested in SPI-to-I2C-Protocol-Conversion-Using-Verilog are comparing it to the libraries listed below
Sorting:
- AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog☆16Updated 2 years ago
- ABP Accelerated VIP☆22Updated 2 years ago
- ☆27Updated 5 months ago
- AHB Bus lite v3.0☆16Updated 6 years ago
- this is an AHB to APB bridge with Synopsys VIP based test enviroment. RTL can be found from UVM website.☆18Updated 11 years ago
- ☆20Updated 3 years ago
- ☆13Updated 6 years ago
- this repository is a project about iic master, created by gyj in second half of 2017☆18Updated 7 years ago
- OpenExSys_NoC a mesh-based network on chip IP.☆18Updated 2 years ago
- This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.☆22Updated 7 years ago
- A 32 point radix-2 FFT module written in Verilog☆23Updated 5 years ago
- AXI4 with a FIFO integrated with VIP☆22Updated last year
- ☆26Updated 4 years ago
- Build an open source, extremely simple DMA.☆23Updated 6 years ago
- OBI SystemVerilog synthesizable interconnect IPs for on-chip communication☆19Updated last month
- DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8☆15Updated last month
- DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog☆31Updated 7 years ago
- Implementation of the PCIe physical layer☆59Updated 5 months ago
- CORDIC VLSI-IP for deep learning activation functions☆15Updated 6 years ago
- ☆21Updated 5 years ago
- This is the UVM environment for UART-APB IP core. This environment contains full UVM components. It is only used for studing and invetiga…☆24Updated 6 years ago
- Verilog Implementation of the Number Theoretic Transform (NTT) and its inverse operation (INTT) utilizing modulo arithmetic for lattice-b…☆14Updated 3 weeks ago
- This is a project integrating HLS IP and CortexA9 on Zynq. This CPU-FPGA project, for a Matrix Multiplication Dataflow, is implemented wi…☆20Updated 6 years ago
- SoC Based on ARM Cortex-M3☆34Updated 6 months ago
- Ultra High Performance AXI4-based Direct Memory Access (DMA) Controller. This project was an interview assignment. Work in Progress.☆12Updated last year
- Generic AXI master stub☆19Updated 11 years ago
- 通过SPI协议实现FPGA multiboot在线升级功能☆11Updated 7 years ago
- FFT implementation using CORDIC algorithm written in Verilog.☆34Updated 7 years ago
- Low Density Parity Check Decoder☆18Updated 9 years ago
- Router 1 x 3 verilog implementation☆14Updated 4 years ago