Alternatives and similar repositories for riscv-isa-manual

Users that are interested in riscv-isa-manual are comparing it to the libraries listed below

• riscv-software-src / riscv-isa-sim
  Spike, a RISC-V ISA Simulator
  ☆2,772Updated this week
• riscv-collab / riscv-gnu-toolchain
  GNU toolchain for RISC-V, including GCC
  ☆4,042Updated last week
• riscv-non-isa / riscv-asm-manual
  RISC-V Assembly Programmer's Manual
  ☆1,540Updated this week
• riscv-software-src / opensbi
  RISC-V Open Source Supervisor Binary Interface
  ☆1,233Updated last week
• riscvarchive / riscv-v-spec
  Working draft of the proposed RISC-V V vector extension
  ☆1,038Updated last year
• riscv-software-src / riscv-tools
  RISC-V Tools (ISA Simulator and Tests)
  ☆1,170Updated 2 years ago
• steveicarus / iverilog
  Icarus Verilog
  ☆3,108Updated last week
• riscv-software-src / riscv-tests
  ☆1,041Updated last month
• chipsalliance / rocket-chip
  Rocket Chip Generator
  ☆3,502Updated 2 months ago
• riscv / riscv-opcodes
  RISC-V Opcodes
  ☆780Updated this week
• riscv-boom / riscv-boom
  SonicBOOM: The Berkeley Out-of-Order Machine
  ☆1,941Updated 2 months ago
• verilator / verilator
  Verilator open-source SystemVerilog simulator and lint system
  ☆3,014Updated this week
• riscv-software-src / riscv-pk
  RISC-V Proxy Kernel
  ☆648Updated last month
• darklife / darkriscv
  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
  ☆2,374Updated 2 weeks ago
• openhwgroup / cva6
  The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…
  ☆2,568Updated this week
• ultraembedded / riscv
  RISC-V CPU Core (RV32IM)
  ☆1,507Updated 3 years ago
• OSCPU / NutShell
  RISC-V SoC designed by students in UCAS
  ☆1,471Updated this week
• riscv-non-isa / riscv-elf-psabi-doc
  A RISC-V ELF psABI Document
  ☆793Updated 2 weeks ago
• YosysHQ / picorv32
  PicoRV32 - A Size-Optimized RISC-V CPU
  ☆3,593Updated last year
• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,834Updated 3 weeks ago
• riscvarchive / riscv-cores-list
  RISC-V Cores, SoC platforms and SoCs
  ☆894Updated 4 years ago
• chipsalliance / chisel
  Chisel: A Modern Hardware Design Language
  ☆4,353Updated this week
• lowRISC / ibex
  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
  ☆1,595Updated this week
• riscv-mcu / e203_hbirdv2
  The Ultra-Low Power RISC-V Core
  ☆1,547Updated 9 months ago
• SI-RISCV / e200_opensource
  Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
  ☆2,743Updated 4 years ago
• ucb-bar / chipyard
  An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
  ☆1,915Updated this week
• XUANTIE-RV / openc910
  OpenXuantie - OpenC910 Core
  ☆1,291Updated last year
• TheThirdOne / rars
  RARS -- RISC-V Assembler and Runtime Simulator
  ☆1,373Updated last year
• lowRISC / opentitan
  OpenTitan: Open source silicon root of trust
  ☆2,903Updated this week
• llvm / circt
  Circuit IR Compilers and Tools
  ☆1,865Updated this week