Alternatives and similar repositories for riscv-isa-manual

Users that are interested in riscv-isa-manual are comparing it to the libraries listed below

• riscv-software-src / riscv-isa-sim
  Spike, a RISC-V ISA Simulator
  ☆2,920Updated this week
• riscv-collab / riscv-gnu-toolchain
  GNU toolchain for RISC-V, including GCC
  ☆4,236Updated 2 weeks ago
• riscv-non-isa / riscv-asm-manual
  RISC-V Assembly Programmer's Manual
  ☆1,581Updated this week
• riscv-software-src / opensbi
  RISC-V Open Source Supervisor Binary Interface
  ☆1,303Updated last week
• riscv-software-src / riscv-tools
  RISC-V Tools (ISA Simulator and Tests)
  ☆1,167Updated 2 years ago
• riscvarchive / riscv-v-spec
  Working draft of the proposed RISC-V V vector extension
  ☆1,049Updated last year
• riscv-boom / riscv-boom
  SonicBOOM: The Berkeley Out-of-Order Machine
  ☆2,006Updated 6 months ago
• riscv-software-src / riscv-tests
  ☆1,082Updated this week
• riscv / riscv-opcodes
  RISC-V Opcodes
  ☆811Updated this week
• chipsalliance / rocket-chip
  Rocket Chip Generator
  ☆3,612Updated 2 months ago
• chipsalliance / chisel
  Chisel: A Modern Hardware Design Language
  ☆4,469Updated this week
• riscv-software-src / riscv-pk
  RISC-V Proxy Kernel
  ☆669Updated last month
• riscv-non-isa / riscv-elf-psabi-doc
  A RISC-V ELF psABI Document
  ☆816Updated 2 weeks ago
• verilator / verilator
  Verilator open-source SystemVerilog simulator and lint system
  ☆3,174Updated this week
• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,908Updated last month
• openhwgroup / cva6
  The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…
  ☆2,681Updated last week
• ultraembedded / riscv
  RISC-V CPU Core (RV32IM)
  ☆1,572Updated 4 years ago
• XUANTIE-RV / openc910
  OpenXuantie - OpenC910 Core
  ☆1,342Updated last year
• riscv-mcu / e203_hbirdv2
  The Ultra-Low Power RISC-V Core
  ☆1,644Updated 3 months ago
• ucb-bar / chipyard
  An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
  ☆2,036Updated 3 weeks ago
• SI-RISCV / e200_opensource
  Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
  ☆2,773Updated 4 years ago
• gem5 / gem5
  The official repository for the gem5 computer-system architecture simulator.
  ☆2,298Updated this week
• lowRISC / ibex
  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
  ☆1,676Updated 2 months ago
• YosysHQ / picorv32
  PicoRV32 - A Size-Optimized RISC-V CPU
  ☆3,766Updated last year
• riscvarchive / riscv-cores-list
  RISC-V Cores, SoC platforms and SoCs
  ☆902Updated 4 years ago
• darklife / darkriscv
  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
  ☆2,434Updated 4 months ago
• steveicarus / iverilog
  Icarus Verilog
  ☆3,230Updated last week
• schoeberl / chisel-book
  Digital Design with Chisel
  ☆870Updated last week
• ultraembedded / biriscv
  32-bit Superscalar RISC-V CPU
  ☆1,123Updated 4 years ago
• riscvarchive / riscv-gcc
  ☆373Updated 2 years ago