rachelselinar / DREAMPlaceFPGALinks
An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
☆91Updated 8 months ago
Alternatives and similar repositories for DREAMPlaceFPGA
Users that are interested in DREAMPlaceFPGA are comparing it to the libraries listed below
Sorting:
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆109Updated last year
- Collection of digital hardware modules & projects (benchmarks)☆74Updated 3 weeks ago
- GPU-based logic synthesis tool☆97Updated last month
- ☆77Updated 2 weeks ago
- The first version of TritonPart☆31Updated last year
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆60Updated 7 months ago
- ☆90Updated 6 months ago
- Material for OpenROAD Tutorial at DAC 2020☆46Updated 3 years ago
- ☆41Updated 3 years ago
- ☆29Updated last year
- IDEA project source files☆111Updated 2 months ago
- ☆107Updated 6 years ago
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆166Updated 8 months ago
- reference block design for the ASAP7nm library in Cadence Innovus☆54Updated last year
- RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA☆90Updated 5 years ago
- ☆46Updated last year
- FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool☆103Updated 5 months ago
- EDA physical synthesis optimization kit☆64Updated 2 years ago
- ☆36Updated 2 years ago
- Dataset for ML-guided Accelerator Design☆43Updated last year
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆189Updated 7 months ago
- An integrated CGRA design framework☆91Updated 9 months ago
- An infrastructure for integrated EDA☆42Updated 2 years ago
- Runtime-First FPGA Interchange Routing Contest @ FPGA’24☆34Updated 6 months ago
- This is a python repo for flattening Verilog☆20Updated last week
- EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog☆29Updated 5 years ago
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆60Updated 11 months ago
- ☆95Updated 6 months ago
- DATC RDF☆50Updated 5 years ago
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Updated 2 years ago