TILOS-AI-Institute / MacroPlacementLinks
Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open source
☆265Updated 3 weeks ago
Alternatives and similar repositories for MacroPlacement
Users that are interested in MacroPlacement are comparing it to the libraries listed below
Sorting:
- RePlAce global placement tool☆233Updated 4 years ago
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆128Updated 7 months ago
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆145Updated last month
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆168Updated 2 weeks ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆122Updated last week
- CUGR, VLSI Global Routing Tool Developed by CUHK☆136Updated 2 years ago
- Artificial Netlist Generator☆39Updated last year
- ☆142Updated last year
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆74Updated 9 months ago
- This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024☆48Updated 4 months ago
- ☆299Updated 2 months ago
- ☆80Updated 2 months ago
- ☆268Updated 4 years ago
- Machine Generated Analog IC Layout☆236Updated last year
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆134Updated 2 years ago
- Rsyn – An Extensible Physical Synthesis Framework☆126Updated 10 months ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆104Updated last year
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆39Updated 7 months ago
- EPFL logic synthesis benchmarks☆192Updated 2 weeks ago
- ☆66Updated last year
- ☆56Updated 4 years ago
- DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization (ASPDAC'20)☆113Updated 2 years ago
- ChiPBench:Benchmarking End-to-End Performance of AI-based Chip Placement Algorithms☆39Updated last month
- IDEA project source files☆106Updated 6 months ago
- ☆23Updated 6 months ago
- ☆166Updated 2 months ago
- Hypergraph Partitioning: benchmarks, evaluators, best known solutions and codes☆68Updated this week
- CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)☆371Updated 2 weeks ago
- Deep learning toolkit-enabled VLSI placement☆815Updated last month
- OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/☆432Updated this week