TILOS-AI-Institute / HypergraphPartitioning
Hypergraph Partitioning: benchmarks, evaluators, best known solutions and codes
☆62Updated 3 months ago
Alternatives and similar repositories for HypergraphPartitioning:
Users that are interested in HypergraphPartitioning are comparing it to the libraries listed below
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆66Updated 5 months ago
- Xplace 2.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability Optimization☆113Updated 2 months ago
- ☆26Updated 4 years ago
- Artificial Netlist Generator☆35Updated 11 months ago
- ☆52Updated 3 years ago
- The first version of TritonPart☆23Updated last year
- Must-read papers on Graph Neural Networks (GNNs) for Integrated Circuits (ICs) design, security and reliability. This collection of paper…☆44Updated last year
- GPU-based logic synthesis tool☆80Updated 7 months ago
- ☆20Updated 4 months ago
- ☆28Updated last year
- ☆13Updated 5 months ago
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆136Updated this week
- This the contains the test examples and validator tool for the ISPD2021 Wafer-Scale Physics Modeling contest.☆18Updated 3 years ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆98Updated 11 months ago
- REST, a reinforcement learning framework for constructing rectilinear Steiner Minimum tree (RSMT)☆54Updated 2 years ago
- Official implementation of MacroRank: Ranking Macro Placement Solutions Leveraging Translation Equivariancy (ASP-DAC 2023)☆16Updated last year
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆27Updated 3 months ago
- ☆29Updated last year
- CUGR, VLSI Global Routing Tool Developed by CUHK☆128Updated last year
- Implementation of hMETIS☆10Updated 2 years ago
- Timing prediction dataset download and instructions.☆13Updated last year
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆49Updated last month
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆53Updated 4 years ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆79Updated last month
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆123Updated 4 months ago
- Collection of digital hardware modules & projects (benchmarks)☆41Updated 3 months ago
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆26Updated 2 years ago
- VLSI EDA Global Router☆71Updated 7 years ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆41Updated 5 months ago
- 2019 NTHU CS6135 (CS613500) VLSI Physical Design Automation Course Projects (include Two-way Min-cut Partitioning, Fixed-outline Slicing …☆28Updated last year