AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper accepted to ICCAD2023)!
☆27May 18, 2025Updated last year
Alternatives and similar repositories for AIM
Users that are interested in AIM are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)☆37Mar 12, 2026Updated 4 months ago
- SCARIF is a tool to estimate the embodied carbon emissions of data center servers with accelerator hardware (GPUs, FPGAs, etc.)☆15Updated this week
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆174Mar 12, 2026Updated 4 months ago
- ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)☆64Mar 8, 2026Updated 4 months ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆31Dec 16, 2021Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Reconfigurable Stream Network Architecture☆18May 8, 2025Updated last year
- Exact Symbolic Reasoning via Boolean Equality Saturation☆25Jan 7, 2026Updated 6 months ago
- NPUEval is an LLM evaluation dataset written specifically to target AIE kernel code generation on RyzenAI hardware.☆32Nov 8, 2025Updated 8 months ago
- AGILE: Lightweight and Efficient Asynchronous GPU-SSD Integration (SC25)☆24Apr 14, 2026Updated 3 months ago
- Boosted E-Graph Extraction with Adaptive Heuristics and Exact Solving☆30Jan 7, 2026Updated 6 months ago
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆17Aug 5, 2022Updated 3 years ago
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆22Jul 27, 2023Updated 2 years ago
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Jan 3, 2023Updated 3 years ago
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Aug 26, 2024Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆13Apr 15, 2025Updated last year
- [FCCM 2025] Code Samples for InTAR: Inter-Task Auto-Reconfigurable Accelerator Design for High Data Volume Variation in DNNs☆15Mar 26, 2025Updated last year
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆41Oct 3, 2023Updated 2 years ago
- FleetRec: Large-Scale Recommendation Inference on Hybrid GPU-FPGA Clusters☆17May 26, 2021Updated 5 years ago
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained. Community-maintained version with binar…☆193Mar 8, 2026Updated 4 months ago
- A OpenCL-based FPGA benchmark suite for HPC☆37May 4, 2026Updated 2 months ago
- AutoSA: Polyhedral-Based Systolic Array Compiler☆243Dec 8, 2022Updated 3 years ago
- Number Geometry methods: Shortest Vector Problem and Shorter Basis Problem in Lattice (Hamming distance, Bounded distance decoding, bina…☆14May 19, 2023Updated 3 years ago
- Heterogeneous Accelerated Computed Cluster (HACC) Resources Page☆22Jun 30, 2026Updated 3 weeks ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- EQueue Dialect☆43Feb 3, 2022Updated 4 years ago
- A fast, accurate trace-based simulator for High-Level Synthesis.☆77Dec 19, 2025Updated 7 months ago
- A compiler for lowering quantized ML models to AMD AI Engine (AIE) firmware.☆20Updated this week
- This is a personal archive. Please refer to github.com/UCLA-VAST/RapidStream☆15May 31, 2022Updated 4 years ago
- The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration de…☆38Jul 22, 2025Updated last year
- ☆15Nov 30, 2023Updated 2 years ago
- [FPGA 2023] FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs☆25Feb 14, 2023Updated 3 years ago
- Generate versal system design from ONNX model. AI engine kernels. Sub-microsecond speeds for autoencoders.☆20Dec 29, 2024Updated last year
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆97Apr 30, 2025Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ☆14Jan 24, 2023Updated 3 years ago
- Artifact evaluation of PLDI'24 paper "Allo: A Programming Model for Composable Accelerator Design"☆35Apr 11, 2024Updated 2 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆95Jul 26, 2024Updated last year
- Open-source of MSD framework☆16Sep 12, 2023Updated 2 years ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆102Sep 27, 2024Updated last year
- Python/C/RTL cosimulation with Xilinx's xsim simulator☆78Jul 14, 2026Updated last week
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆99Oct 2, 2021Updated 4 years ago