DASS HLS Compiler
☆30Oct 4, 2023Updated 2 years ago
Alternatives and similar repositories for DSS
Users that are interested in DSS are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Aug 22, 2021Updated 4 years ago
- ☆87Mar 5, 2024Updated 2 years ago
- ☆12Jul 20, 2022Updated 3 years ago
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Aug 26, 2024Updated last year
- A formally verified high-level synthesis tool based on CompCert and written in Coq.☆98Jan 29, 2026Updated last month
- NordVPN Threat Protection Pro™ • AdTake your cybersecurity to the next level. Block phishing, malware, trackers, and ads. Lightweight app that works with all browsers.
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆62Mar 17, 2022Updated 4 years ago
- Bridging polyhedral analysis tools to the MLIR framework☆119Sep 9, 2023Updated 2 years ago
- Vitis HLS LLVM source code and examples☆406Sep 30, 2025Updated 5 months ago
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆17Aug 5, 2022Updated 3 years ago
- [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency☆32Feb 17, 2021Updated 5 years ago
- ☆24Nov 10, 2020Updated 5 years ago
- A multicore microprocessor test harness for measuring interference☆14Apr 16, 2020Updated 5 years ago
- Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog.☆119May 14, 2025Updated 10 months ago
- On the Effects of Quantisation on Model Uncertainty in Bayesian Neural Networks☆18Apr 8, 2024Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration☆15Sep 14, 2020Updated 5 years ago
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.☆186Mar 8, 2026Updated 2 weeks ago
- Benchmarks, testbenches, and transformed codes for high-level synthesis research☆13Aug 18, 2017Updated 8 years ago
- A high-level performance analysis tool for FPGA-based accelerators☆19Jun 2, 2017Updated 8 years ago
- AutoSA: Polyhedral-Based Systolic Array Compiler☆240Dec 8, 2022Updated 3 years ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆110Mar 9, 2024Updated 2 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)☆170Nov 7, 2023Updated 2 years ago
- A Comprehensive Model-Based Analysis Framework for High Level Synthesis of Real Applications☆38Oct 20, 2020Updated 5 years ago
- ☆22Sep 27, 2022Updated 3 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆54Jul 17, 2023Updated 2 years ago
- Low level design of a chip built for optimizing/accelerating CNN classifiers over gray scale images.☆13May 14, 2019Updated 6 years ago
- ☆65May 6, 2020Updated 5 years ago
- An open source high level synthesis (HLS) tool built on top of LLVM☆127Jun 11, 2024Updated last year
- Accelerating SSSP for power-law graphs using an FPGA.☆23Mar 29, 2022Updated 4 years ago
- Stencil with Optimized Dataflow Architecture☆18Feb 27, 2024Updated 2 years ago
- SAMO: Streaming Architecture Mapping Optimisation☆34Oct 4, 2023Updated 2 years ago
- Hi-DMM: High-Performance Dynamic Memory Management in HLS (High-Level Synthesis)☆25Oct 30, 2018Updated 7 years ago
- ☆30Apr 26, 2019Updated 6 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- ☆61Aug 4, 2023Updated 2 years ago
- HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing (FPGA'19 Best Paper)☆340Apr 20, 2024Updated last year
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆336Jan 20, 2025Updated last year
- A OpenCL-based FPGA benchmark suite for HPC☆37Jan 29, 2026Updated last month
- ABACUS is a tool for approximate logic synthesis☆14Jul 13, 2020Updated 5 years ago
- ☆43May 26, 2018Updated 7 years ago
- RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance☆12May 3, 2024Updated last year