Xilinx / fpga24_routing_contestLinks
Runtime-First FPGA Interchange Routing Contest @ FPGA’24
☆33Updated this week
Alternatives and similar repositories for fpga24_routing_contest
Users that are interested in fpga24_routing_contest are comparing it to the libraries listed below
Sorting:
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆41Updated 5 years ago
- A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.☆41Updated 2 years ago
- Open source process design kit for 28nm open process☆56Updated last year
- sram/rram/mram.. compiler☆35Updated last year
- ☆32Updated 4 months ago
- An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization☆31Updated last year
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆26Updated 4 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆52Updated 5 years ago
- Material for OpenROAD Tutorial at DAC 2020☆47Updated 2 years ago
- OpenDesign Flow Database☆16Updated 6 years ago
- Project repo for the POSH on-chip network generator☆46Updated 2 months ago
- A configurable SRAM generator☆50Updated this week
- PDPU: An Open-Source Posit Dot-Product Unit for Deep Learning Applications☆40Updated 2 years ago
- ☆15Updated 2 years ago
- [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.☆126Updated 2 years ago
- AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…☆83Updated last year
- Generator of arithmetic circuits (multipliers, adders) and approximate circuits☆34Updated 4 months ago
- SRAM☆22Updated 4 years ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆37Updated 2 years ago
- The Verilog source code for DRUM approximate multiplier.☆31Updated 2 years ago
- Proposed RISC-V Composable Custom Extensions Specification☆70Updated last year
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆82Updated last month
- Workshop on Open-Source EDA Technology (WOSET)☆49Updated 6 months ago
- ☆44Updated 5 years ago
- Next generation CGRA generator☆111Updated last week
- ☆27Updated 5 years ago
- ☆86Updated last year
- DASS HLS Compiler☆29Updated last year
- The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration de…☆36Updated 2 weeks ago
- Open source RTL simulation acceleration on commodity hardware☆27Updated 2 years ago