Alternatives and similar repositories for Xplace

Users that are interested in Xplace are comparing it to the libraries listed below

• lamda-bbo / Efficient-TDP
  Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".
  ☆60Updated 7 months ago
• cuhk-eda / cu-gr-2
  ☆48Updated 2 years ago
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆142Updated 2 years ago
• TimingPredict / TimingPredict
  Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)
  ☆86Updated last year
• cuhk-eda / ripple
  Pin-Accessible Legalization for Mixed-Cell-Height Circuits
  ☆31Updated 3 years ago
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆97Updated last month
• RsynTeam / rsyn-x
  Rsyn – An Extensible Physical Synthesis Framework
  ☆136Updated last year
• limbo018 / Limbo
  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
  ☆189Updated 8 months ago
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆108Updated last year
• geziangfinn / easyPlace
  Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS
  ☆54Updated last year
• The-OpenROAD-Project / RePlAce
  RePlAce global placement tool
  ☆246Updated 5 years ago
• ABKGroup / TritonRoute-WXL
  ☆35Updated 5 years ago
• PKU-IDEA / OpenPARF
  🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit
  ☆168Updated 8 months ago
• daeyeon22 / artificial_netlist_generator
  Artificial Netlist Generator
  ☆46Updated last year
• cuhk-eda / dr-cu
  Dr. CU, VLSI Detailed Routing Tool Developed by CUHK
  ☆141Updated 2 years ago
• lamda-bbo / Open3DBench
  Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".
  ☆77Updated 7 months ago
• NYU-MLDA / OpenABC
  OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…
  ☆141Updated 5 months ago
• ABKGroup / ISPD26-Contest
  ISPD26 Contest: Post-Placement Buffering and Sizing
  ☆26Updated 2 weeks ago
• ABKGroup / TritonPart
  The first version of TritonPart
  ☆31Updated 2 years ago
• TILOS-AI-Institute / MacroPlacement
  Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open source
  ☆295Updated 2 weeks ago
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆79Updated 7 years ago
• tsung-wei-huang / ece5960-physical-design
  ☆42Updated 3 years ago
• TILOS-AI-Institute / HypergraphPartitioning
  Hypergraph Partitioning: benchmarks, evaluators, best known solutions and codes
  ☆76Updated last week
• ASU-VDA-Lab / 2024_ICCAD_Contest_Gate_Sizing_Benchmark
  ☆26Updated last year
• ABKGroup / BlobPlacement
  ☆15Updated last year
• ABKGroup / PlacementEssentialReadings
  ☆61Updated 4 years ago
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆75Updated last month
• NVlabs / INSTA
  ☆91Updated 7 months ago
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆64Updated 7 months ago
• NVlabs / CircuitOps
  ☆97Updated 6 months ago