Alternatives and similar repositories for eda-collection

Users that are interested in eda-collection are comparing it to the libraries listed below

• lnis-uofu / LSOracle
  IDEA project source files
  ☆110Updated last month
• The-OpenROAD-Project / TritonRoute
  UCSD Detailed Router
  ☆94Updated 4 years ago
• mflowgen / freepdk-45nm
  ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen
  ☆192Updated 5 years ago
• The-OpenROAD-Project / DAC-2020-Tutorial
  Material for OpenROAD Tutorial at DAC 2020
  ☆46Updated 2 years ago
• scale-lab / OpenPhySyn
  EDA physical synthesis optimization kit
  ☆63Updated 2 years ago
• parallaxsw / OpenSTA
  ☆94Updated last week
• cuhk-eda / ripple-fpga
  RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA
  ☆90Updated 5 years ago
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆88Updated 7 months ago
• limbo018 / Limbo
  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
  ☆187Updated 6 months ago
• aolofsson / IDEA
  ☆33Updated 5 years ago
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆71Updated 3 weeks ago
• woset-workshop / woset-workshop.github.io
  Workshop on Open-Source EDA Technology (WOSET)
  ☆48Updated last year
• ncsu-eda / FreePDK3
  ☆183Updated 4 years ago
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆107Updated last year
• circuitgraph / circuitgraph
  Tools for working with circuits as graphs in python
  ☆127Updated 2 years ago
• bojackchen / digital-flow
  This is a tutorial on standard digital design flow
  ☆79Updated 4 years ago
• jinwookjungs / datc_robust_design_flow
  DATC Robust Design Flow.
  ☆36Updated 5 years ago
• The-OpenROAD-Project / asap5
  ☆36Updated 2 years ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 5 years ago
• The-OpenROAD-Project-Attic / FastRoute
  LEF/DEF-based port of Iowa State's open-source FastRoute 4.1
  ☆58Updated 5 years ago
• OpenTimer / Parser-Verilog
  A Standalone Structural Verilog Parser
  ☆99Updated 3 years ago
• jinwookjungs / lefdef_util
  A LEF/DEF Utility.
  ☆32Updated 6 years ago
• mflowgen / mflowgen
  mflowgen -- A Modular ASIC/FPGA Flow Generator
  ☆275Updated 2 weeks ago
• IntelLabs / FloorSet
  ☆77Updated 5 months ago
• StanfordAHA / garnet
  Next generation CGRA generator
  ☆116Updated this week
• The-OpenROAD-Project / asap7
  ☆216Updated 8 months ago
• brabect1 / sta_basics_course
  Introductory course into static timing analysis (STA).
  ☆99Updated 5 months ago
• verilog-to-routing / tatum
  Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits
  ☆62Updated last year
• OpenTimer / Parser-SPEF
  A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
  ☆57Updated 3 years ago
• hsluoyz / Atalanta
  Atalanta is a modified ATPG (Automatic Test Pattern Generation) tool and fault simulator, orginally from VirginiaTech University.
  ☆84Updated last year