NVlabs / CircuitOps
☆79Updated last month
Alternatives and similar repositories for CircuitOps
Users that are interested in CircuitOps are comparing it to the libraries listed below
Sorting:
- ☆22Updated 6 months ago
- This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024☆47Updated 3 months ago
- ☆29Updated last year
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆141Updated 2 weeks ago
- ☆31Updated 3 years ago
- ☆52Updated 7 months ago
- ☆43Updated last year
- EDA physical synthesis optimization kit☆54Updated last year
- Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".☆39Updated 2 months ago
- ☆71Updated 5 months ago
- ☆25Updated last year
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆104Updated last year
- Collection of digital hardware modules & projects (benchmarks)☆55Updated last week
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆47Updated 7 months ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆81Updated 2 weeks ago
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆125Updated 7 months ago
- Material for OpenROAD Tutorial at DAC 2020☆47Updated 2 years ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆120Updated this week
- Artificial Netlist Generator☆39Updated last year
- DATC Robust Design Flow.☆37Updated 5 years ago
- ☆38Updated 2 years ago
- GPU-based logic synthesis tool☆81Updated 9 months ago
- ChiPBench:Benchmarking End-to-End Performance of AI-based Chip Placement Algorithms☆37Updated 2 weeks ago
- A parallel global router using the Galois framework☆27Updated last year
- CUGR, VLSI Global Routing Tool Developed by CUHK☆134Updated 2 years ago
- VLSI EDA Global Router☆73Updated 7 years ago
- ☆30Updated 3 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆157Updated 4 months ago
- ☆56Updated last month
- ☆24Updated last year