RsynTeam / rsyn-xLinks
Rsyn – An Extensible Physical Synthesis Framework
☆136Updated last year
Alternatives and similar repositories for rsyn-x
Users that are interested in rsyn-x are comparing it to the libraries listed below
Sorting:
- CUGR, VLSI Global Routing Tool Developed by CUHK☆141Updated 2 years ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆141Updated 2 years ago
- VLSI EDA Global Router☆79Updated 7 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆189Updated 8 months ago
- RePlAce global placement tool☆246Updated 5 years ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆108Updated last year
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆150Updated 7 months ago
- ☆48Updated 2 years ago
- UCSD Detailed Router☆94Updated 5 years ago
- Open Source Detailed Placement engine☆40Updated 6 years ago
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆31Updated 3 years ago
- GPU-based logic synthesis tool☆97Updated last month
- DATC RDF☆50Updated 5 years ago
- ☆35Updated 5 years ago
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆59Updated 5 years ago
- Collection of digital hardware modules & projects (benchmarks)☆75Updated last month
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆167Updated 8 months ago
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆86Updated last year
- IDEA project source files☆111Updated 3 months ago
- DATC Robust Design Flow.☆36Updated 5 years ago
- Bounded-Skew DME v1.3☆15Updated 7 years ago
- Incremental Timing-Driven Placement, problem C of ICCAD contest 2015☆15Updated 8 years ago
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆61Updated last year
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆54Updated last year
- EPFL logic synthesis benchmarks☆224Updated 2 months ago
- BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…☆21Updated 7 years ago
- Database and Tool Framework for EDA☆122Updated 4 years ago
- Material for OpenROAD Tutorial at DAC 2020☆46Updated 3 years ago
- Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)☆44Updated 7 years ago
- ☆61Updated 4 years ago