RsynTeam / rsyn-xLinks
Rsyn – An Extensible Physical Synthesis Framework
☆126Updated last year
Alternatives and similar repositories for rsyn-x
Users that are interested in rsyn-x are comparing it to the libraries listed below
Sorting:
- CUGR, VLSI Global Routing Tool Developed by CUHK☆137Updated 2 years ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆135Updated 2 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆174Updated 2 months ago
- VLSI EDA Global Router☆75Updated 7 years ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆105Updated last year
- RePlAce global placement tool☆236Updated 4 years ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆133Updated last month
- ☆44Updated last year
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆29Updated 3 years ago
- ☆31Updated 4 years ago
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆58Updated 4 years ago
- GPU-based logic synthesis tool☆86Updated last month
- DATC RDF☆50Updated 5 years ago
- UCSD Detailed Router☆90Updated 4 years ago
- Open Source Detailed Placement engine☆38Updated 5 years ago
- Collection of digital hardware modules & projects (benchmarks)☆59Updated last week
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆44Updated 9 months ago
- IDEA project source files☆107Updated 8 months ago
- DATC Robust Design Flow.☆36Updated 5 years ago
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆76Updated 11 months ago
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆53Updated 6 months ago
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆151Updated 3 months ago
- BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…☆21Updated 6 years ago
- Incremental Timing-Driven Placement, problem C of ICCAD contest 2015☆14Updated 7 years ago
- Global Router Built for ICCAD Contest 2019☆32Updated 5 years ago
- Bounded-Skew DME v1.3☆14Updated 7 years ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆82Updated 3 months ago
- Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)☆41Updated 6 years ago
- A parallel global router using the Galois framework☆29Updated 2 years ago
- A logic synthesis tool☆77Updated 3 weeks ago