AGS-L / DynaRapidLinks
☆17Updated last month
Alternatives and similar repositories for DynaRapid
Users that are interested in DynaRapid are comparing it to the libraries listed below
Sorting:
- Runtime-First FPGA Interchange Routing Contest @ FPGA’24☆34Updated 7 months ago
- ☆33Updated 5 years ago
- Material for OpenROAD Tutorial at DAC 2020☆46Updated 3 years ago
- Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator☆41Updated last month
- ☆15Updated 4 years ago
- Open source process design kit for 28nm open process☆72Updated last year
- Educational verilog library that supports IEEE754 floating point arithmetic with a parametrizable mantissa and exponent☆30Updated 9 months ago
- 55nm CMOS Open Source PDK by ICsprout Integrated Circuit Co., Ltd.☆153Updated last week
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆91Updated 8 months ago
- This repo contains the code that runs RL+GNN to optimize LDOs in SKY130 process.☆46Updated last year
- ☆77Updated this week
- The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration de…☆38Updated 5 months ago
- Matchlib Connections Library - latency insensitive channels (from NVlabs/matchlib/connections)☆43Updated this week
- ☆33Updated last year
- ☆108Updated 6 years ago
- ☆29Updated last year
- ☆44Updated 5 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆24Updated 4 years ago
- Design of 1024*32 (4kB) SRAM with access time < 2.5ns using OpenRAM☆19Updated 5 years ago
- sram/rram/mram.. compiler☆43Updated 2 years ago
- Introductory course into static timing analysis (STA).☆99Updated 6 months ago
- A configurable SRAM generator☆56Updated 4 months ago
- Intel's Analog Detailed Router☆39Updated 6 years ago
- Collection of digital hardware modules & projects (benchmarks)☆75Updated last month
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆81Updated 4 years ago
- Workshop on Open-Source EDA Technology (WOSET)☆48Updated last year
- fakeram generator for use by researchers who do not have access to commercial ram generators☆38Updated 2 years ago
- IDEA project source files☆111Updated 2 months ago
- Open Source PHY v2☆32Updated last year
- ☆20Updated 4 years ago