UIUC-ChenLab / NimblockLinks
☆13Updated 2 years ago
Alternatives and similar repositories for Nimblock
Users that are interested in Nimblock are comparing it to the libraries listed below
Sorting:
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆66Updated 4 years ago
- ☆59Updated 6 months ago
- A fast, accurate trace-based simulator for High-Level Synthesis.☆69Updated 6 months ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆84Updated last year
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆47Updated 3 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆80Updated 3 years ago
- ☆10Updated 2 years ago
- ☆31Updated 11 months ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆31Updated 3 years ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆70Updated last year
- Graph-learning assisted instruction vulnerability estimation published in DATE 2020☆14Updated 4 years ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆38Updated 2 years ago
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆63Updated last week
- ☆40Updated last year
- AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…☆25Updated 4 months ago
- MICRO22 artifact evaluation for Sparseloop☆44Updated 3 years ago
- ☆29Updated 3 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆57Updated 5 months ago
- ☆58Updated 2 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆77Updated 6 years ago
- Release of stream-specialization software/hardware stack.☆121Updated 2 years ago
- Processing in Memory Emulation☆22Updated 2 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆83Updated 2 years ago
- ☆24Updated 4 years ago
- An integrated CGRA design framework☆91Updated 6 months ago
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆66Updated this week
- gem5 repository to study chiplet-based systems☆81Updated 6 years ago
- ☆72Updated 2 years ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆63Updated 11 months ago