zslwyuan / AMF-Placer
AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BRAM...)
☆97Updated 8 months ago
Related projects ⓘ
Alternatives and complementary repositories for AMF-Placer
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆76Updated 3 weeks ago
- Material for OpenROAD Tutorial at DAC 2020☆46Updated last year
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆128Updated last year
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆118Updated last month
- RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA☆89Updated 4 years ago
- ☆99Updated 4 years ago
- Xplace 2.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability Optimization☆99Updated this week
- IDEA project source files☆98Updated 2 weeks ago
- CUGR, VLSI Global Routing Tool Developed by CUHK☆123Updated last year
- GPU-based logic synthesis tool☆69Updated 4 months ago
- Rsyn – An Extensible Physical Synthesis Framework☆122Updated 4 months ago
- UCSD Detailed Router☆80Updated 3 years ago
- ☆38Updated 2 months ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆35Updated 2 months ago
- The first version of TritonPart☆22Updated 10 months ago
- DATC RDF☆48Updated 4 years ago
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆36Updated last month
- ☆17Updated last year
- An integrated CGRA design framework☆83Updated last week
- Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits☆55Updated 5 months ago
- EDA wiki☆116Updated 4 months ago
- ☆29Updated last year
- A parallel global router using the Galois framework☆26Updated last year
- Dataset for ML-guided Accelerator Design☆31Updated this week
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆147Updated last year
- ☆36Updated last year
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆52Updated 4 years ago
- Collection of digital hardware modules & projects (benchmarks)☆33Updated last week
- Global Router Built for ICCAD Contest 2019☆30Updated 4 years ago
- EPFL logic synthesis benchmarks☆166Updated 2 months ago