TILOS-AI-Institute / MLCAD-2023-FPGA-Macro-Placement-ContestLinks
☆31Updated 2 years ago
Alternatives and similar repositories for MLCAD-2023-FPGA-Macro-Placement-Contest
Users that are interested in MLCAD-2023-FPGA-Macro-Placement-Contest are comparing it to the libraries listed below
Sorting:
- ☆97Updated 6 months ago
- This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024☆53Updated 11 months ago
- ☆32Updated 4 years ago
- Artificial Netlist Generator☆46Updated last year
- ☆72Updated 2 months ago
- Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".☆60Updated 7 months ago
- ☆25Updated last year
- ☆29Updated last year
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆86Updated last year
- GPU-based logic synthesis tool☆97Updated last month
- Benchmarks for Approximate Circuit Synthesis☆17Updated 5 years ago
- ☆78Updated last week
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆167Updated 8 months ago
- The release for paper "Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designs"☆14Updated last year
- ☆59Updated 7 months ago
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆141Updated 5 months ago
- DATC RDF☆50Updated 5 years ago
- CUGR, VLSI Global Routing Tool Developed by CUHK☆141Updated 2 years ago
- ☆91Updated 6 months ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆150Updated 6 months ago
- MLCAD 2020: Reinforcement for logic optimization sequence exploration☆29Updated 5 years ago
- Collection of digital hardware modules & projects (benchmarks)☆75Updated last month
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆141Updated 2 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆189Updated 7 months ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆108Updated last year
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆55Updated last year
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆64Updated 7 months ago
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆61Updated last year
- Rsyn – An Extensible Physical Synthesis Framework☆136Updated last year
- DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization (ASPDAC'20)☆115Updated 2 years ago