⛔ DEPRECATED ⛔ Lean but mean RISC-V system!
☆229Nov 22, 2023Updated 2 years ago
Alternatives and similar repositories for snitch
Users that are interested in snitch are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- An energy-efficient RISC-V floating-point compute cluster.☆126Mar 13, 2026Updated 3 weeks ago
- A scalable 256/1024-RISC-V-core system with low-latency access into shared L1 memory.☆315Mar 31, 2026Updated last week
- A SystemVerilog source file pickler.☆61Oct 20, 2024Updated last year
- The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …☆507Apr 3, 2026Updated last week
- 2-8bit weights, 8-bit activations flexible Neural Processing Engine for PULP clusters☆31Jan 29, 2026Updated 2 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.☆143Updated this week
- The multi-core cluster of a PULP system.☆113Mar 28, 2026Updated 2 weeks ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆115Sep 18, 2023Updated 2 years ago
- Documentation for the OpenHW Group's set of CORE-V RISC-V cores☆224Jan 11, 2026Updated 3 months ago
- A Fast, Low-Overhead On-chip Network☆279Updated this week
- Common SystemVerilog components☆733Updated this week
- This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no…☆470May 15, 2025Updated 10 months ago
- whatever it means☆16Apr 1, 2026Updated last week
- Functional verification project for the CORE-V family of RISC-V cores.☆671Apr 3, 2026Updated last week
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,205May 26, 2025Updated 10 months ago
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,539Mar 31, 2026Updated last week
- 4 stage, in-order, compute RISC-V core based on the CV32E40P☆267Nov 6, 2024Updated last year
- RISC-V RV64GC emulator designed for RTL co-simulation☆237Nov 20, 2024Updated last year
- A dependency management tool for hardware projects.☆360Apr 2, 2026Updated last week
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,824Feb 17, 2026Updated last month
- ☆100Mar 5, 2026Updated last month
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆2,873Mar 23, 2026Updated 2 weeks ago
- This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain a…☆543Nov 26, 2024Updated last year
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- Generic Register Interface (contains various adapters)☆138Feb 24, 2026Updated last month
- This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.☆199Apr 3, 2026Updated last week
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆587Updated this week
- Tile based architecture designed for computing efficiency, scalability and generality☆288Mar 30, 2026Updated last week
- VeeR EL2 Core☆329Mar 12, 2026Updated 3 weeks ago
- VeeR EH1 core☆933May 29, 2023Updated 2 years ago
- DUTH RISC-V Superscalar Microprocessor☆34Oct 23, 2024Updated last year
- A minimal Linux-capable 64-bit RISC-V SoC built around CVA6☆325Apr 2, 2026Updated last week
- Instruction Set Generator initially contributed by Futurewei☆307Oct 17, 2023Updated 2 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- ☆17Mar 21, 2026Updated 2 weeks ago
- A mixed-criticality platform built around Cheshire, with a number of safety/security and predictability features. Ready-to-use FPGA flow …☆126Apr 1, 2026Updated last week
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,209Apr 1, 2026Updated last week
- RISC-V Zve32x Vector Coprocessor☆212Jan 22, 2026Updated 2 months ago
- SERV - The SErial RISC-V CPU☆1,779Feb 19, 2026Updated last month
- 4 stage, in-order, secure RISC-V core based on the CV32E40P☆157Oct 31, 2024Updated last year
- IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system☆21Jan 17, 2026Updated 2 months ago