4 stage, in-order, secure RISC-V core based on the CV32E40P
☆161Oct 31, 2024Updated last year
Alternatives and similar repositories for cv32e40s
Users that are interested in cv32e40s are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 4 stage, in-order, compute RISC-V core based on the CV32E40P☆275Nov 6, 2024Updated last year
- 4 stage, in-order, secure RISC-V core based on the CV32E40P with Zfinx and Zce ISA extentions☆27Aug 16, 2023Updated 2 years ago
- The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.☆136Jul 11, 2025Updated last year
- CV32E40X Design-Verification environment☆18Jun 2, 2026Updated last month
- This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.☆209Jun 15, 2026Updated last month
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Generic Register Interface (contains various adapters)☆141Updated this week
- RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions☆91Apr 1, 2026Updated 3 months ago
- Functional verification project for the CORE-V family of RISC-V cores.☆703Jul 17, 2026Updated last week
- pulp_soc is the core building component of PULP based SoCs☆84Jul 17, 2026Updated last week
- Instruction Set Generator initially contributed by Futurewei☆311Oct 17, 2023Updated 2 years ago
- CORE-V Family of RISC-V Cores☆364Mar 31, 2026Updated 3 months ago
- Documentation for the OpenHW Group's set of CORE-V RISC-V cores☆228Jan 11, 2026Updated 6 months ago
- The multi-core cluster of a PULP system.☆114Jul 17, 2026Updated last week
- VeeR EL2 Core☆342Updated this week
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- RISC-V Debug Support for our PULP RISC-V Cores☆316Updated this week
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆624Updated this week
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,267May 29, 2026Updated last month
- FuseSoC-based SoC for VeeR EH1 and EL2☆341Dec 11, 2024Updated last year
- ☆148Feb 29, 2024Updated 2 years ago
- RISC-V microcontroller for embedded, FPGA and ASIC applications☆201Updated this week
- RISC-V System on Chip Template☆163Updated this week
- VeeR EH2 core☆274Updated this week
- Common SystemVerilog components☆769Updated this week
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- A scalable 256/1024-RISC-V-core system with low-latency access into shared L1 memory.☆323Updated this week
- A Linux-capable RISC-V multicore for and by the world☆823Jul 13, 2026Updated last week
- RISC-V processor☆32May 26, 2022Updated 4 years ago
- Working draft of the proposed RISC-V Bitmanipulation extension☆219Mar 20, 2024Updated 2 years ago
- VeeR EH1 core☆959Jul 16, 2026Updated last week
- Simple runtime for Pulp platforms☆53Jul 7, 2026Updated 2 weeks ago
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,987Jul 14, 2026Updated last week
- SERV - The SErial RISC-V CPU☆1,836Jul 10, 2026Updated 2 weeks ago
- Technology dependent cells instantiated in the design for generic process (simulation, FPGA)☆93Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- GEMM and GEMM-Ops accelerator for PULP systems☆110Updated this week
- The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH…☆67Jul 17, 2026Updated last week
- RISC-V Configuration Validator☆82Apr 16, 2026Updated 3 months ago
- eXtensible Heterogeneous Energy-Efficient Platform based on RISC-V☆288Updated this week
- A minimal Linux-capable 64-bit RISC-V SoC built around CVA6☆355Updated this week
- UNSUPPORTED INTERNAL toolchain builds☆48Feb 24, 2026Updated 5 months ago
- A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)☆225Jul 14, 2026Updated last week