An energy-efficient RISC-V floating-point compute cluster.
☆138Jul 21, 2026Updated this week
Alternatives and similar repositories for snitch_cluster
Users that are interested in snitch_cluster are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- whatever it means☆18Jun 10, 2026Updated last month
- A high-efficiency system-on-chip for floating-point compute workloads.☆49Jan 13, 2025Updated last year
- Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.☆163Updated this week
- The multi-core cluster of a PULP system.☆114Updated this week
- GEMM and GEMM-Ops accelerator for PULP systems☆108Updated this week
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- ⛔ DEPRECATED ⛔ Lean but mean RISC-V system!☆230Nov 22, 2023Updated 2 years ago
- ☆44Updated this week
- A Fast, Low-Overhead On-chip Network☆319Updated this week
- A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)☆224Jul 14, 2026Updated last week
- A minimal Linux-capable 64-bit RISC-V SoC built around CVA6☆355Updated this week
- DNN Compiler for Heterogeneous SoCs☆71Jun 23, 2026Updated 3 weeks ago
- ☆18Jun 8, 2026Updated last month
- Heterogeneous Cluster Interconnect to bind special-purpose HW accelerators with general-purpose cluster cores☆17Jul 12, 2026Updated last week
- IREE compiler and runtime for Snitch☆15May 14, 2026Updated 2 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆22Updated this week
- ☆18Jun 29, 2026Updated 3 weeks ago
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆622Jul 2, 2026Updated 2 weeks ago
- A mixed-criticality platform built around Cheshire, with a number of safety/security and predictability features. Ready-to-use FPGA flow …☆126Updated this week
- ☆27Jan 30, 2026Updated 5 months ago
- The OpenPiton Platform☆17Aug 14, 2024Updated last year
- ☆15Updated this week
- A dependency management tool for hardware projects.☆379Updated this week
- ☆63Mar 31, 2025Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- ☆16Jan 18, 2025Updated last year
- A simple, scalable, source-synchronous, all-digital DDR link☆39Updated this week
- Simple runtime for Pulp platforms☆53Jul 7, 2026Updated 2 weeks ago
- Generic Register Interface (contains various adapters)☆141Jul 2, 2026Updated 2 weeks ago
- This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no…☆486May 8, 2026Updated 2 months ago
- SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…☆107Nov 26, 2025Updated 7 months ago
- 2-8bit weights, 8-bit activations flexible Neural Processing Engine for PULP clusters☆33May 20, 2026Updated 2 months ago
- Technology dependent cells instantiated in the design for generic process (simulation, FPGA)☆93Jul 14, 2026Updated last week
- Large-scale 2D mesh system with dedicated GeMM, on-chip RDMA and Rendez-vous accelerators.☆23Updated this week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆70Jul 10, 2026Updated last week
- The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …☆531Jun 8, 2026Updated last month
- This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain a…☆560Nov 26, 2024Updated last year
- For CPU experiment☆14Feb 23, 2021Updated 5 years ago
- RISCulator is a RISC-V emulator.☆12Aug 18, 2023Updated 2 years ago
- Like VexRiscv, but, Harder, Better, Faster, Stronger☆237Updated this week
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,338Updated this week