chipsalliance / dromajoLinks
RISC-V RV64GC emulator designed for RTL co-simulation
☆235Updated last year
Alternatives and similar repositories for dromajo
Users that are interested in dromajo are comparing it to the libraries listed below
Sorting:
- RISC-V Torture Test☆202Updated last year
- Tile based architecture designed for computing efficiency, scalability and generality☆275Updated 2 months ago
- Instruction Set Generator initially contributed by Futurewei☆302Updated 2 years ago
- ☆189Updated last year
- RiscyOO: RISC-V Out-of-Order Processor☆165Updated 5 years ago
- ⛔ DEPRECATED ⛔ Lean but mean RISC-V system!☆226Updated 2 years ago
- TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems☆162Updated 3 years ago
- 4 stage, in-order, compute RISC-V core based on the CV32E40P☆246Updated last year
- RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT☆179Updated 6 months ago
- ☆300Updated 2 weeks ago
- ☆150Updated 2 years ago
- RISC-V Processor Trace Specification☆198Updated 2 months ago
- RISC-V Debug Support for our PULP RISC-V Cores☆283Updated last week
- ☆248Updated 2 years ago
- Documentation for the OpenHW Group's set of CORE-V RISC-V cores☆219Updated 2 weeks ago
- VeeR EL2 Core☆304Updated 2 weeks ago
- A minimal Linux-capable 64-bit RISC-V SoC built around CVA6☆300Updated last week
- Ariane is a 6-stage RISC-V CPU☆151Updated 5 years ago
- A scalable 256/1024-RISC-V-core system with low-latency access into shared L1 memory.☆312Updated 2 weeks ago
- Verilog Configurable Cache☆186Updated last week
- 4 stage, in-order, secure RISC-V core based on the CV32E40P☆151Updated last year
- Ocelot: The Berkeley Out-of-Order Machine With V-EXT support☆198Updated last week
- ☆147Updated last year
- ☆89Updated 3 months ago
- Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.☆125Updated this week
- ☆358Updated 2 months ago
- FuseSoC-based SoC for VeeR EH1 and EL2☆331Updated 11 months ago
- This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.☆190Updated 2 months ago
- RISC-V Verification Interface☆126Updated last week
- CORE-V Family of RISC-V Cores☆308Updated 9 months ago