2-8bit weights, 8-bit activations flexible Neural Processing Engine for PULP clusters
☆36May 20, 2026Updated 2 months ago
Alternatives and similar repositories for neureka
Users that are interested in neureka are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆47Jul 31, 2026Updated last week
- A mixed-criticality platform built around Cheshire, with a number of safety/security and predictability features. Ready-to-use FPGA flow …☆127Updated this week
- GEMM and GEMM-Ops accelerator for PULP systems☆113Updated this week
- matrix-coprocessor for RISC-V☆37Feb 27, 2026Updated 5 months ago
- ⛔ DEPRECATED ⛔ Lean but mean RISC-V system!☆230Nov 22, 2023Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- DNN Compiler for Heterogeneous SoCs☆73Aug 4, 2026Updated last week
- ☆15Updated this week
- ☆26Jul 22, 2026Updated 2 weeks ago
- Theia: ray graphic processing unit☆20Jul 17, 2014Updated 12 years ago
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆18Updated this week
- ☆29Oct 20, 2019Updated 6 years ago
- Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.☆165Updated this week
- ☆36May 21, 2026Updated 2 months ago
- DUTH RISC-V Superscalar Microprocessor☆35Oct 23, 2024Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Simple runtime for Pulp platforms☆54Jul 7, 2026Updated last month
- Learn NVDLA by SOMNIA☆42Dec 13, 2019Updated 6 years ago
- SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…☆110Nov 26, 2025Updated 8 months ago
- A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)☆226Updated this week
- Large-scale 2D mesh system with dedicated GeMM, on-chip RDMA and Rendez-vous accelerators.☆23Updated this week
- Systolic array based simple TPU for CNN on PYNQ-Z2☆51Jun 24, 2022Updated 4 years ago
- ☆12Feb 15, 2024Updated 2 years ago
- Neural Engine, 16 input channels☆19Oct 31, 2022Updated 3 years ago
- Digital Design Lab Spring 2019 Final Project☆13Jun 17, 2019Updated 7 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆20Jun 10, 2026Updated 2 months ago
- A reliable, real-time subsystem for the Carfield SoC☆21Dec 2, 2025Updated 8 months ago
- A lightweight core for the CV32E40 implementing the RISC-V vector extension specification. (v0.8)☆35Jan 19, 2021Updated 5 years ago
- ☆127Apr 20, 2026Updated 3 months ago
- IEEE P1735 decryptor for VHDL☆40Jun 23, 2015Updated 11 years ago
- A curated list for Efficient Large Language Models☆11Mar 25, 2024Updated 2 years ago
- An energy-efficient RISC-V floating-point compute cluster.☆144Updated this week
- FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference☆177Jun 9, 2023Updated 3 years ago
- ☆21Nov 23, 2022Updated 3 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- This repository contains the code for this paper: Chiplet-Gym: An RL-based Optimization Framework for Chiplet-based AI Accelerator☆23Sep 28, 2024Updated last year
- Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC☆57Jan 20, 2026Updated 6 months ago
- vector accelerating unit☆37Dec 1, 2020Updated 5 years ago
- RISC-V SIMD Superscalar Dual-Issue Processor☆31Apr 24, 2025Updated last year
- A Fast, Low-Overhead On-chip Network☆326Updated this week
- A minimal Linux-capable 64-bit RISC-V SoC built around CVA6☆357Updated this week
- RISC-V Zve32x Vector Coprocessor☆219Jan 22, 2026Updated 6 months ago