Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
☆587Apr 7, 2026Updated last week
Alternatives and similar repositories for cvfpu
Users that are interested in cvfpu are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Common SystemVerilog components☆733Updated this week
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,213May 26, 2025Updated 10 months ago
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,546Updated this week
- Tile based architecture designed for computing efficiency, scalability and generality☆288Mar 30, 2026Updated 2 weeks ago
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆2,886Updated this week
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- ☆369Sep 12, 2025Updated 7 months ago
- [UNRELEASED] FP div/sqrt unit for transprecision☆27Sep 9, 2025Updated 7 months ago
- 4 stage, in-order, compute RISC-V core based on the CV32E40P☆267Nov 6, 2024Updated last year
- Generic Register Interface (contains various adapters)☆138Feb 24, 2026Updated last month
- synthesiseable ieee 754 floating point library in verilog☆730Mar 13, 2023Updated 3 years ago
- 4 stage, in-order, secure RISC-V core based on the CV32E40P☆157Oct 31, 2024Updated last year
- Functional verification project for the CORE-V family of RISC-V cores.☆671Apr 3, 2026Updated last week
- A Linux-capable RISC-V multicore for and by the world☆790Updated this week
- SCR1 is a high-quality open-source RISC-V MCU core in Verilog☆976Nov 15, 2024Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …☆505Updated this week
- RSD: RISC-V Out-of-Order Superscalar Processor☆1,162Feb 21, 2026Updated last month
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,836Updated this week
- Documentation for the OpenHW Group's set of CORE-V RISC-V cores☆224Jan 11, 2026Updated 3 months ago
- A scalable 256/1024-RISC-V-core system with low-latency access into shared L1 memory.☆316Updated this week
- CORE-V Family of RISC-V Cores☆347Mar 31, 2026Updated 2 weeks ago
- BaseJump STL: A Standard Template Library for SystemVerilog☆661Updated this week
- FuseSoC-based SoC for VeeR EH1 and EL2☆339Dec 11, 2024Updated last year
- VeeR EH1 core☆935May 29, 2023Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- The multi-core cluster of a PULP system.☆113Mar 28, 2026Updated 2 weeks ago
- ☆1,961Updated this week
- 32-bit Superscalar RISC-V CPU☆1,223Sep 18, 2021Updated 4 years ago
- CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…☆516Updated this week
- pulp_soc is the core building component of PULP based SoCs☆83Mar 10, 2025Updated last year
- Instruction Set Generator initially contributed by Futurewei☆308Oct 17, 2023Updated 2 years ago
- Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.☆143Updated this week
- ☆61Feb 18, 2019Updated 7 years ago
- The OpenPiton Platform☆780Feb 25, 2026Updated last month
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Verilog Configurable Cache☆195Mar 9, 2026Updated last month
- SonicBOOM: The Berkeley Out-of-Order Machine☆2,125Mar 11, 2026Updated last month
- An open-source static random access memory (SRAM) compiler.☆1,036Mar 12, 2026Updated last month
- ☆100Mar 5, 2026Updated last month
- RISC-V Debug Support for our PULP RISC-V Cores☆306Apr 1, 2026Updated last week
- This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no…☆472May 15, 2025Updated 10 months ago
- SERV - The SErial RISC-V CPU☆1,779Feb 19, 2026Updated last month