Alternatives and similar repositories for Static_BFP_HW

Users that are interested in Static_BFP_HW are comparing it to the libraries listed below

• jha-lab / codebench
  [TECS'23] A project on the co-design of Accelerators and CNNs.
  ☆20Updated 2 years ago
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆37Updated 4 years ago
• UCLA-VAST / FlexCNN
  ☆71Updated 2 years ago
• yuehniu / CNN.frequencyFPGA
  CNN Accelerator in Frequency Domain
  ☆12Updated 5 years ago
• gicLAB / SECDA
  ☆22Updated 2 years ago
• fffasttime / AnyPackingNet
  ☆27Updated 2 months ago
• ebby-s / MX-for-FPGA
  Implementation of Microscaling data formats in SystemVerilog.
  ☆19Updated 9 months ago
• horizon-research / systolic-array-dataflow-optimizer
  A general framework for optimizing DNN dataflow on systolic array
  ☆36Updated 4 years ago
• elliothe / N3H_Core
  [FPGA-2022] N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores
  ☆12Updated 3 years ago
• pgroupATusc / GraphACT
  Implementation of paper "GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platform".
  ☆10Updated 4 years ago
• AlexMontgomerie / samo
  SAMO: Streaming Architecture Mapping Optimisation
  ☆33Updated last year
• Kareem-Emad / DCNN-Accelerator
  Low level design of a chip built for optimizing/accelerating CNN classifiers over gray scale images.
  ☆12Updated 6 years ago
• AlexMontgomerie / fpgaconvnet-tutorial
  A collection of tutorials for the fpgaConvNet framework.
  ☆39Updated 8 months ago
• GATECH-EIC / AutoDNNchip
  ☆71Updated 5 years ago
• sfu-arch / SpGEMM
  ☆35Updated 4 years ago
• CASR-HKU / MSD-FCCM23
  Open-source of MSD framework
  ☆16Updated last year
• CASR-HKU / DPACS
  ☆18Updated 2 years ago
• walkieq / RNN_HLS
  An LSTM template and a few examples using Vivado HLS
  ☆45Updated last year
• xliu0709 / WinoCNN
  An HLS based winograd systolic CNN accelerator
  ☆52Updated 3 years ago
• hyoukjun / DesignCNNAccelerators
  Lab code for three-day lecture, "Designing CNN Accelerators using Bluespec System Verilog", given at SNU in December 2017
  ☆29Updated 6 years ago
• awai54st / LUTNet
  ☆58Updated 5 years ago
• enyac-group / MaxEVA
  MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)
  ☆21Updated last year
• gem5-X / TiC-SAT
  ☆16Updated 3 weeks ago
• DNN-Accelerators / Open-Source-IPs
  ☆33Updated 6 years ago
• DPCEKY / systolic-array
  HLS implemented systolic array structure
  ☆41Updated 7 years ago
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆46Updated 3 months ago
• PSCLab-ASU / Systolic-CNN
  ☆16Updated 4 years ago
• AlexMontgomerie / fpgaconvnet-model
  Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.
  ☆29Updated 6 months ago
• AlexMontgomerie / fpgaconvnet-hls
  ☆30Updated 6 months ago
• ehw-fit / tf-approximate
  Approximate layers - TensorFlow extension
  ☆27Updated last month