danielholanda / LeFlow

Related projects ⓘ

Alternatives and complementary repositories for LeFlow

• fpgasystems / spooNN
  FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)
  ☆261Updated 4 years ago
• jofrfu / tinyTPU
  Implementation of a Tensor Processing Unit for embedded systems and the IoT.
  ☆400Updated 5 years ago
• Xilinx / finn
  Dataflow compiler for QNN inference on FPGAs
  ☆747Updated this week
• Xilinx / BNN-PYNQ
  Quantized Neural Networks (QNNs) on PYNQ
  ☆671Updated 2 years ago
• dgschwend / zynqnet
  Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"
  ☆741Updated 7 years ago
• UCSBarchlab / OpenTPU
  A open source reimplementation of Google's Tensor Processing Unit (TPU).
  ☆364Updated 6 years ago
• ZFTurbo / Verilog-Generator-of-Neural-Net-Digit-Detector-for-FPGA
  Verilog Generator of Neural Net Digit Detector for FPGA
  ☆291Updated 2 years ago
• IBM / AccDNN
  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
  ☆397Updated 4 years ago
• hsharma35 / dnnweaver2
  Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.
  ☆207Updated 5 years ago
• fastmachinelearning / hls4ml
  Machine learning on FPGAs using HLS
  ☆1,275Updated this week
• Xilinx / ml-suite
  Getting Started with Xilinx ML Suite
  ☆335Updated 3 years ago
• fastmachinelearning / hls4ml-tutorial
  Tutorial notebooks for hls4ml
  ☆300Updated 2 weeks ago
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆302Updated 6 months ago
• Xilinx / RFNoC-HLS-NeuralNet
  ☆104Updated 5 years ago
• Xilinx / CHaiDNN
  HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs
  ☆323Updated 5 years ago
• Xilinx / Vitis-HLS-Introductory-Examples
  ☆597Updated 3 weeks ago
• cornell-zhang / bnn-fpga
  Binarized Convolutional Neural Networks on Software-Programmable FPGAs
  ☆302Updated 3 years ago
• Xilinx / QNN-MO-PYNQ
  ☆242Updated 4 years ago
• spcl / gemm_hls
  Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
  ☆304Updated 2 years ago
• embedeep / Free-TPU
  Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classificatio…
  ☆239Updated last year
• hillhao / PYNQ-project
  PYNQ, Neural network Language model, Overlay
  ☆101Updated 5 years ago
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆151Updated 7 years ago
• KastnerRG / pp4fpgas
  Parallel Programming for FPGAs -- An open-source high-level synthesis book
  ☆793Updated 5 months ago
• Xilinx / PYNQ-ComputerVision
  Computer Vision Overlays on Pynq
  ☆174Updated 5 years ago
• Xilinx / finn-examples
  Dataflow QNN inference accelerator examples on FPGAs
  ☆183Updated last week
• Xilinx / PYNQ_Workshop
  ☆401Updated 2 months ago
• Xilinx / SDSoC-Tutorials
  SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials
  ☆146Updated 4 years ago
• NNgen / nngen
  NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
  ☆339Updated last year
• pulp-platform / pulp
  This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain a…
  ☆452Updated 6 months ago