Alternatives and similar repositories for SIGMA

Users that are interested in SIGMA are comparing it to the libraries listed below

• Accelergy-Project / accelergy
  Accelergy is an energy estimation infrastructure for accelerator energy estimations
  ☆149Updated 4 months ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆63Updated 2 weeks ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆58Updated 3 months ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆66Updated 4 years ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆80Updated 3 years ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆44Updated 3 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆84Updated last year
• KULeuven-MICAS / zigzag
  HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators
  ☆160Updated last month
• arc-research-lab / CHARM
  CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture
  ☆157Updated this week
• xuanyoya / Interstellar-CNN-scheduler
  Tool for optimize CNN blocking
  ☆94Updated 5 years ago
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆139Updated 3 months ago
• pku-liang / Sanger
  A co-design architecture on sparse attention
  ☆52Updated 4 years ago
• maestro-project / gamma
  ☆40Updated last year
• cornell-zhang / FracBNN
  FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations
  ☆94Updated 4 years ago
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆83Updated 2 years ago
• Accelergy-Project / accelergy-timeloop-infrastructure
  Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop
  ☆57Updated 5 months ago
• KULeuven-MICAS / DeFiNES
  A framework for fast exploration of the depth-first scheduling space for DNN accelerators
  ☆40Updated 2 years ago
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆66Updated last week
• UCLA-VAST / FlexCNN
  ☆72Updated 2 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• hsharma35 / bitfusion
  Simulator for BitFusion
  ☆102Updated 5 years ago
• maestro-project / maestro
  An analytical cost model evaluating DNN mappings (dataflows and tiling).
  ☆232Updated last year
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆59Updated 6 months ago
• isakedo / DNNsim
  ☆35Updated 5 years ago
• UCLA-VAST / AutoSA
  AutoSA: Polyhedral-Based Systolic Array Compiler
  ☆225Updated 2 years ago
• hatsu3 / Sanger
  ☆48Updated 4 years ago
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆77Updated 6 years ago
• Accelergy-Project / timeloop-accelergy-exercises
  Exercises for exploring the Fibertree, Timeloop and Accelergy tools
  ☆104Updated 5 months ago
• pku-dasys / pillars
  An integrated CGRA design framework
  ☆91Updated 6 months ago
• SET-Scheduling-Project / GEMINI-HPCA2024
  Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
  ☆93Updated 5 months ago