Alternatives and similar repositories for ViTCoD:

Users that are interested in ViTCoD are comparing it to the libraries listed below

• mit-han-lab / spatten
  [HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning
  ☆82Updated 5 months ago
• pku-liang / Sanger
  A co-design architecture on sparse attention
  ☆51Updated 3 years ago
• hatsu3 / Sanger
  ☆43Updated 3 years ago
• SamsungLabs / Butterfly_Acc
  The codes and artifacts associated with our MICRO'22 paper titled: "Adaptable Butterfly Accelerator for Attention-based NNs via Hardware …
  ☆121Updated last year
• sharc-lab / Edge-MoE
  Edge-MoE: Memory-Efficient Multi-Task Vision Transformer Architecture with Task-level Sparsity via Mixture-of-Experts
  ☆101Updated 9 months ago
• GATECH-EIC / ViTALiTy
  ViTALiTy (HPCA'23) Code Repository
  ☆21Updated last year
• cjg91 / trans-fat
  An FPGA Accelerator for Transformer Inference
  ☆76Updated 2 years ago
• sjtu-zhao-lab / SALO
  An efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences
  ☆24Updated 11 months ago
• arc-research-lab / SSR
  SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)
  ☆28Updated 6 months ago
• clevercool / ANT-Quantization
  ☆89Updated last year
• mit-emze / cimloop
  ☆50Updated last week
• jeffreyyu0602 / quantized-training
  ☆21Updated this week
• jha-lab / acceltran
  [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers
  ☆34Updated last year
• CASR-HKU / MSD-FCCM23
  Open-source of MSD framework
  ☆16Updated last year
• Zhaoshixin-sky / CIM-MLC
  [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators
  ☆27Updated 8 months ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆77Updated 6 months ago
• DD-DuDa / awesome-vit-quantization-acceleration
  List of papers related to Vision Transformers quantization and hardware acceleration in recent AI conferences and journals.
  ☆73Updated 8 months ago
• georgia-tech-synergy-lab / SIGMA
  RTL implementation of Flex-DPE.
  ☆97Updated 4 years ago
• isakedo / DNNsim
  ☆32Updated 4 years ago
• albertomarchisio / SwiftTron
  ☆38Updated last year
• abdelfattah-lab / BitMoD-HPCA-25
  ☆17Updated 2 months ago
• fffasttime / AnyPackingNet
  ☆25Updated last month
• KULeuven-MICAS / DeFiNES
  A framework for fast exploration of the depth-first scheduling space for DNN accelerators
  ☆36Updated 2 years ago
• hguq / HG-PIPE
  FPGA-based hardware accelerator for Vision Transformer (ViT), with Hybrid-Grained Pipeline.
  ☆28Updated 3 weeks ago
• SET-Scheduling-Project / GEMINI-HPCA2024
  Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
  ☆67Updated 2 weeks ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆41Updated 2 years ago
• PSAL-POSTECH / ONNXim
  ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference
  ☆88Updated this week
• wangxy-2000 / pimsim-nn
  ☆47Updated 11 months ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆46Updated 4 months ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆47Updated 2 weeks ago