NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators
☆51Jan 2, 2025Updated last year
Alternatives and similar repositories for NPUsim
Users that are interested in NPUsim are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Nebula: Deep Neural Network Benchmarks in C++☆13Jan 2, 2025Updated last year
- NeuroSpector: Dataflow and Mapping Optimizer for Deep Neural Network Accelerators☆21Mar 20, 2025Updated last year
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆197Jan 8, 2026Updated 3 months ago
- ☆12Sep 18, 2024Updated last year
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆112Apr 28, 2025Updated 11 months ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆23Apr 25, 2025Updated 11 months ago
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆72Dec 29, 2025Updated 3 months ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆67Sep 24, 2021Updated 4 years ago
- A simulation framework for modeling efficiency of Graph Neural Network Dataflows☆24Feb 14, 2025Updated last year
- GPGPU-SIM 使用篇☆14Nov 12, 2022Updated 3 years ago
- Kite: Architecture Simulator for RISC-V Instruction Set☆20Mar 22, 2026Updated 3 weeks ago
- STONNE Simulator integrated into SST Simulator☆22Apr 5, 2024Updated 2 years ago
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆30Jul 17, 2023Updated 2 years ago
- A Toy-Purpose TPU Simulator☆22Jun 7, 2024Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆21Dec 10, 2022Updated 3 years ago
- [ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architecture…☆25Oct 1, 2022Updated 3 years ago
- ☆12Jul 2, 2024Updated last year
- ☆43Mar 31, 2025Updated last year
- ☆63Nov 29, 2025Updated 4 months ago
- A Flexible Cache Architectural Simulator☆17Sep 16, 2025Updated 6 months ago
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆17Feb 23, 2026Updated last month
- Matrix Accelerator Generator for GeMM Operations based on SIGMA Architecture in CHISEL HDL☆15Mar 21, 2024Updated 2 years ago
- SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…☆88Nov 26, 2025Updated 4 months ago
- DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Cycle-accurate C++ & SystemC simulator for the RISC-V GPGPU Ventus☆32Apr 4, 2026Updated last week
- Open-source AMBA CHI infrastructures (supporting Issue B, E.b)☆37Mar 31, 2026Updated last week
- An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model☆540Jun 25, 2024Updated last year
- GPGPU-Sim 中文注释版代码，包含 GPGPU-Sim 模拟器的最新版代码，经过中文注释，以帮助中文用户更好地理解和使用该模拟器。☆26Dec 18, 2024Updated last year
- MICRO22 artifact evaluation for Sparseloop☆48Aug 8, 2022Updated 3 years ago
- A cycle-accurate RISC-V CPU simulator + RTL modeling library in pure Python.☆18Aug 27, 2025Updated 7 months ago
- STONNE: A Simulation Tool for Neural Networks Engines☆152Jun 16, 2025Updated 9 months ago
- Chisel implementation of Neural Processing Unit for System on the Chip☆27Jan 19, 2026Updated 2 months ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆83Mar 12, 2025Updated last year
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- OpenExSys_CoherentCache a directory-based MESI protocol coherent cache IP.☆22Mar 25, 2025Updated last year
- HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs☆40Dec 9, 2024Updated last year
- ☆68Apr 22, 2025Updated 11 months ago
- A docker image for One Student One Chip's debug exam☆10Sep 22, 2023Updated 2 years ago
- Code released to accompany the ISCA paper: "T4: Compiling Sequential Code for Effective Speculative Parallelization in Hardware"☆29Feb 18, 2022Updated 4 years ago
- DUTH RISC-V Superscalar Microprocessor☆34Oct 23, 2024Updated last year
- ☆14Jan 24, 2023Updated 3 years ago