ARM-software / SCALE-Sim
☆348Updated last year
Alternatives and similar repositories for SCALE-Sim:
Users that are interested in SCALE-Sim are comparing it to the libraries listed below
- Repository to host and maintain scale-sim-v2 code☆276Updated this week
- Explore the energy-efficient dataflow scheduling for neural networks.☆220Updated 4 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆209Updated 5 years ago
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆134Updated last month
- Timeloop performs modeling, mapping and code-generation for tensor algebra workloads on various accelerator architectures.☆371Updated last week
- An analytical cost model evaluating DNN mappings (dataflows and tiling).☆211Updated 11 months ago
- AutoSA: Polyhedral-Based Systolic Array Compiler☆214Updated 2 years ago
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆230Updated 2 years ago
- RTL implementation of Flex-DPE.☆98Updated 5 years ago
- A pre-RTL, power-performance model for fixed-function accelerators☆174Updated last year
- PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.☆195Updated last year
- STONNE: A Simulation Tool for Neural Networks Engines☆125Updated 9 months ago
- HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing☆334Updated 11 months ago
- An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model☆439Updated 8 months ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆325Updated 5 years ago
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆107Updated 2 years ago
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆331Updated 2 months ago
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆131Updated this week
- Simulator for BitFusion☆97Updated 4 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs☆165Updated last year
- Deep Learning Accelerator (Convolution Neural Networks)☆177Updated 7 years ago
- An integrated power, area, and timing modeling framework for multicore and manycore architectures☆180Updated 4 years ago
- Binarized Convolutional Neural Networks on Software-Programmable FPGAs☆304Updated 4 years ago
- NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and…☆226Updated 6 years ago
- Tool for optimize CNN blocking☆94Updated 5 years ago
- Benchmarks for Accelerator Design and Customized Architectures☆120Updated 4 years ago
- HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators☆141Updated 3 weeks ago
- Vitis HLS Library for FINN☆191Updated last week
- NVSim - A performance, energy and area estimation tool for non-volatile memory (NVM)☆112Updated 6 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆161Updated 3 years ago